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IP101G-DS-R01 数据表(PDF) 35 Page - List of Unclassifed Manufacturers

部件名 IP101G-DS-R01
功能描述  Single Port 10/100 MII/RMII/TP/Fiber Fast Ethernet Transceiver
PDF  65 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
网页  
标志 ETC - List of Unclassifed Manufacturers

IP101G-DS-R01 数据表(HTML) 35 Page - List of Unclassifed Manufacturers

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IP101G
Data Sheet
35/65
January 14, 2014
Copyright © 2011, IC Plus Corp.
IP101G-DS-R01
MII page11 register18
page
MII
ROM R/W
Description
Default
11
18[15:0]
RO SYMB_ERR_CNT
RX symbol error counter
Each symbol error of idle will add the counter by 1. Several
symbol errors of one data frame will add the counter by 1.
0x0000
MII page18 register17
page
MII
ROM R/W
Description
Default
RX Counter Interrupt Control/Status Register
17[15]
R/W RXERR_INTR_EN
Set 1 to enable RXERR interrupt function
0
17[14]
R/W RXERR_INTR_SEL
Select RXERR interrupt type
0= RX CRC error
1= RX Symbol error
0
17[13:1]
RO Reserved
0x000
18
17[0]
RO/
LH
INTR_RXERR_CNTDOWN
Flag to indicate RX error countdown interrupt
0
The other Registers are reserved registers. User is inhibited to access to these registers. It may
introduce abnormal function to write these registers.
4.6 LED Pin Control Register
MII page16 Register28
page
MII
ROM R/W
Description
Default
LED Pin Driving Control Register
16
28[11:9]
R/W LED_DRIVE
LED PAD Driving Current
3’b000: 1.62mA
3’b001: 3.24mA
3’b010: 4.86mA
3’b011: 6.48mA
3’b100: 8.10mA
3’b101: 12.96mA
3’b110: 17.82mA
3’b111: 22.68mA
Note: Simulation IC bias to the fixed 0.4V.
3’b000
The other Registers are reserved registers. User is inhibited to access to these registers. It may
introduce abnormal function to write these registers.
4.7 WOL+ Control Register
MII page4 register16
page
MII
ROM R/W
Description
Default
PHY WOL+ Control Register



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