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TDA4VEN...Q1 数据表(PDF) 141 Page - Texas Instruments |
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TDA4VEN...Q1 数据表(HTML) 141 Page - Texas Instruments |
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141 / 236 page  6.9.5.12 GPIO Table 6-61, Table 6-62, and Table 6-63 present timing conditions, timing requirements, and switching characteristics for GPIO. The device has three instances of the GPIO module. • MCU_GPIO0 • GPIO0 • GPIO1 Note GPIOn_x is generic name used to describe a GPIO signal, where n represents the specific GPIO module and x represents one of the input/output signals associated with the module. For additional description information on the device GPIO, see the corresponding subsections within Signal Descriptions and Detailed Description sections. Table 6-61. GPIO Timing Conditions PARAMETER BUFFER TYPE MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate LVCMOS (VDD(1) = 1.8V) 0.0018 6.6 V/ns LVCMOS (VDD(1) = 3.3V) 0.0033 6.6 V/ns I2C OD FS (VDD(1) = 1.8V) 0.0018 6.6 V/ns I2C OD FS (VDD(1) = 3.3V) 0.0033 0.08 V/ns OUTPUT CONDITIONS CL Output load capacitance LVCMOS 3 10 pF I2C OD FS 3 100 pF (1) VDD stands for corresponding power supply. For more information on the power supply name and the corresponding ball(s), see POWER column of the Pin Attributes table. Table 6-62. GPIO Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT GPIO1 tw(GPIO_IN) Pulse width, GPIOn_x 2P(1) + 30 ns (1) P = functional clock period in ns. Table 6-63. GPIO Switching Characteristics NO. PARAMETER DESCRIPTION BUFFER TYPE MIN MAX UNIT GPIO2 tw(GPIO_OUT) Pulse width, GPIOn_x LVCMOS 0.975P(1) - 3.6 ns I2C OD FS 160 ns (1) P = functional clock period in ns. For more information, see General-Purpose Interface (GPIO) section in Peripherals chapter in the device TRM. www.ti.com TDA4VEN-Q1, TDA4AEN-Q1 SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 141 Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1 |
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