TDA4VEN...Q1 datasheet(219/236 Pages) TI

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8.2.2.3 DQS (only available in Octal SPI devices)

• The OSPI[x]_CLK output pin must be connected to the CLK input pin of the attached OSPI/QSPI/SPI device

• The DQS pin of the attached OSPI/QSPI/SPI device must be connected to OSPI[x]_DQS pin

• The signal propagation delay from the attached OSPI/QSPI/SPI device DQS pin to the OSPI[x]_DQS pin (D

to C) must be approximately equal to the signal propagation delay from the OSPI[x]_CLK pin to the attached

OSPI/QSPI/SPI device CLK pin (A to B)

• The signal propagation delay of each OSPI[x]_D[y] and OSPI[x]_CSn[z] pin to the corresponding attached

OSPI/QSPI/SPI device data and control pin (E to F, or F to E) must be approximately equal to the signal

propagation delay from the OSPI[x]_CLK pin to the attached OSPI/QSPI/SPI device CLK pin (A to B)

• 50Ω PCB routing is recommended along with series terminations, as shown in Figure 8-3

• Propagation delays and matching:

– (D to C) = ((A to B) ± 30ps)

– (E to F, or F to E) = ((A to B) ± 60ps)

OSPI[x]_CLK

OSPI/QSPI/SPI

Device Clock Input

OSPI/QSPI/SPI

Device IO[y], CS#

OSPI[x]_D[y],

OSPI[x]_CSn[z]

OSPI_Board_03

OSPI[x]_LBCLKO

OSPI[x]_DQS

OSPI Device DQS

* 0Ω resistor (R1), located as close as possible to the OSPI[x]_CLK pin, is a placeholder for fine tuning, if needed.

Figure 8-3. OSPI Connectivity Schematic for DQS

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TDA4VEN-Q1, TDA4AEN-Q1

SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024

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TDA4VEN...Q1 数据表(PDF) 219 Page - Texas Instruments