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TMP86FS49AIUG 数据表(PDF) 191 Page - Toshiba Semiconductor |
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TMP86FS49AIUG 数据表(HTML) 191 Page - Toshiba Semiconductor |
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191 / 296 page  Page 175 TMP86FS49AIUG Figure 14-15 Example of Transmit/Receive (Transmit) Error Processing (b) Receive errors Receive errors occur on the following situation. To protect SIO1RDB and the shift register contents, the received data is ignored while the SIO1SR<RXERR> is “1”. • Shift operation is finished before reading out received data from SIO1RDB at SIO1SR<RXF> is “1” in an external clock operation. If receive error occurs, set the SIO1CR<SIOS> to “0” for reading the data that received immediately before error occurence. And read the data from SIO1RDB. Data in shift register (at errors occur) can be read by reading the SIO1RDB again. When SIO1SR<RXERR> is cleared to “0” after reading the received data, SIO1SR<RXF> is cleared to “0”. After clearing SIO1CR<SIOS> to “0”, when 8-bit serial clock is input to SCK1 pin, re- ceive operation is stopped. To restart the receive operation, confirm that SIO1SR<SIOF> is cleared to “0”. If the received error occurs, set the SIO1CR<SIOINH> to “1” for stopping the receive operation immediately. In this case, SIO1CR<SIOS>, SIO1SR register, SIO1RDB reg- ister and SIO1TDB register are initialized. Writing transmit data B Writing transmit data A Unknown B A7 A6 A A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 D7 D6 D5 D4 D3 D2 D1 D0 E7 E6 E5 E4 E3 E2 E1 E0 F7 F6 F5 F4 F3 F2 F1 F0 Start shift operation Start shift operation Start shift operation Reading received data F Reading received data E Reading received data D F E D SIO1CR<SIOS> SIO1SR<SIOF> SIO1SR<SEF> SCK1 pin output SO1 pin SI1 pin INTSIO1 interrupt request SIO1SR<TXF> SIO1SR<RXF> SIO1RDB SIO1TDB SIO1SR<TXERR> SIO1CR<SIOINH> |
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