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ADE5166 数据表(PDF) 37 Page - Analog Devices |
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ADE5166 数据表(HTML) 37 Page - Analog Devices |
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37 / 148 page ![]() Preliminary Technical Data ADE5166/ADE5169/ADE5566/ADE5569 Rev. PrB | Page 37 of 148 Address MADDPT[6:0] Mnemonic R/W Length (Bits) Signed/ Unsigned Default Description 0x29 CF2NUM R/W 16 U 0 Sets CF2 numerator register. 0x2A CF2DEN R/W 16 U 0x003F Sets CF2 denominator register. 0x2B MODE3 R/W 8 U 0 Enables Zero Crossing Outputs. See Table 38. 0x3B Reserved 0 This register must be kept at its default value for proper operation. 0x3C Reserved 0x0300 This register must be kept at its default value for proper operation. 0x3D CALMODE2 R/W 8 U 0 For ADE5166/ADE5169 only. Set calibration mode. 0x3E Reserved 0 This register must be kept at its default value for proper operation. 0x3F Reserved 0 This register must be kept at its default value for proper operation. 1 This function is not available in the ADE5566 and ADE5166. 2 This function is not available in the ADE5566 and ADE5569. ENERGY MEASUREMENT INTERNAL REGISTERS DETAILS Table 32. Mode 1 Register (MODE1, 0x0B) Bit Mnemonic Default Description 7 SWRST 0 Setting this bit resets all of the energy measurement registers to their default values. 6 DISZXLPF 0 Setting this bit disables the zero-crossing low-pass filter. 5 INTE 0 Setting this bit enables the digital integrator for use with a di/dt sensor. 4 SWAPBITS 0 Setting this bit swaps CH1 ADC and CH2 ADC. 3 PWRDN 0 Setting this bit powers down voltage and current ADCs. 2 DISCF2 1 Setting this bit disables Frequency Output CF2. 1 DISCF1 1 Setting this bit disables Frequency Output CF1. 0 DISHPF 0 Setting this bit disables the HPFs in voltage and current channels. Table 33. Mode 2 Register (MODE2, 0x0C) Bit Mnemonic Default Description 7 to 6 CF2SEL[1:0] 01 Configuration bits for CF2 output. CF2SEL[1:0] Result 00 CF2 frequency is proportional to active power. 01 CF2 frequency is proportional to reactive power.1 1x CF2 frequency is proportional to apparent power or Irms. 5 to 4 CF1SEL[1:0] 00 Configuration bits for CF1 output. CF1SEL[1:0] Result 00 CF1 frequency is proportional to active power. 01 CF1 frequency is proportional to reactive power.1 1x CF1 frequency is proportional to apparent power or Irms. 3 VARMSCFCON 0 Configuration bits for apparent power or Irms for CF1, CF2 outputs, and VA accumulation registers (VAHR, RVAHR, and LVAHR). Note that CF1 cannot be proportional to VA if CF2 is proportional to Irms and vice versa. VARMSCFCON Result 0 If CF1SEL[1:0] = 1x, CF1 is proportional to VA. If CF2SEL[1:0] = 1x, CF2 is proportional to VA. 1 If CF1SEL[1:0] = 1x, CF1 is proportional to Irms. If CF2SEL[1:0] = 1x, CF2 is proportional to Irms. 2 ZXRMS 0 Logic 1 enables update of rms values synchronously to Voltage ZX. |
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