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ADE5166 数据表(PDF) 98 Page - Analog Devices

部件名 ADE5166
功能描述  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  148 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE5166 数据表(HTML) 98 Page - Analog Devices

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ADE5166/ADE5169/ADE5566/ADE5569
Preliminary Technical Data
Rev. PrB | Page 98 of 148
LCDVC
LCDVB
LCDVA
LCDVP1
LCDVP2
CHARGE PUMP
AND
LCD WAVEFORM
CIRCUITRY
100nF
470nF
470nF
470nF
Figure 68. External Circuitry for Charge Pump Option
External Resistor Ladder
To enable the external resistor ladder option, set the EXTRES
bit in the LCD Configuration X SFR (LCDCONX, 0x9C). When
EXTRES = 1, the LCD waveform voltages are supplied by the
external resistor ladder. Because the LCD voltages are not
generated on-chip, the LCD bias compensation implemented to
maintain contrast over temperature and supply is not possible.
The external circuitry needed for the resistor ladder option is
shown in Figure 69. The resistors required should be in the
range of 10 kΩ to 100 kΩ and based on the current required by
the LCD being used.
LCDVC
LCDVB
LCDVA
LCDVP1
LCDVP2
LCD WAVEFORM
CIRCUITRY
Figure 69. External Circuitry for External Resistor Ladder Option
LCD FUNCTION IN PSM2
The LCDPSM2 and LCDEN bits in the LCD configuration SFR
(LCDCON, 0x95) control LCD functionality in the PSM2
operating mode (see Table 93).
Note that the internal voltage reference must be enabled by
setting the REF_BAT_EN bit in the peripheral configuration
SFR (PERIPH, 0xF4) to allow LCD operation in PSM2 (see
Table 19).
Table 93. Bits Controlling LCD Functionality in PSM2 Mode
LCDPSM2
LCDEN
Result
0
0
The display is off in PSM2.
0
1
The display is on in PSM2.
1
X
The display is off in PSM2.
In addition, note that the LCD configuration and data memory
is retained when the display is turned off.
Example LCD Setup
An example of how to set up the LCD peripheral for a specific
LCD is described in this section with the following parameters:
Type of LCD: 5 V, 4× multiplexed with 1/3 bias, 96 segment
Voltage generation: internal charge pump
Refresh rate: 64 Hz
A 96-segment LCD with 4× multiplexing requires 96/4 = 24
segment lines. Sixteen pins, FP0 to FP15, are automatically
dedicated for use as LCD segments. Eight more pins must be
chosen for the LCD function. Because the LCD has 4× multi-
plexing, all four common lines are used. As a result, COM2/FP28
and COM3/FP27 cannot be used as segment lines. Based on the
alternate functions of the pins used for FP16 through FP25,
FP16 to FP23 are chosen for the eight remaining segment lines.
These pins are enabled for LCD functionality in the LCD
segment enable SFR (LCDSEGE, 0x97) and LCD Segment
Enable 2 SFR (LCDSEGE2, 0xED).
To determine contrast setting for this 5 V LCD, Table 83 shows
the BIASLVL[5:0] setting that corresponds to a VC of 5 V in
1/3 bias mode. The maximum bias level setting for this LCD is
BIASLVL[5:0] = 101110.
The LCD is set up with the following 8052 code:
; set up LCD pins to have LCD functionality
MOV
LCDSEG,#FP20EN+FP21EN+FP22EN+FP23EN
MOV
LCDSEGX,#FP16EN+FP17EN+FP18EN+FP19EN
; set up LCDCON for fLCDCLK=2048Hz, 1/3 bias
and 4x multiplexing
MOV
LCDCON,#BIAS+LMUX1+LMUX0
; set up LCDCONX for charge pump and
BIASLVL[110111]
MOV
LCDCONX,#BIASLVL5+BIASLVL4+BIASLVL3+BI
ASLVL2+BIASLVL1+BIASLVL0
; set up refresh rate for 64Hz with fLCDCLK =
2048 Hz
MOV
LCDCLK,#FD3+FD2+FD1+FD0
; set up LCD data registers with data to be
displayed using
; LCDPTR and LCDDATA registers
; turn all segments on FP27 ON and FP26 OFF
ORL
LCDCONY,#01h
; start data memory
refresh
MOV
LCDDAT,#F0H
MOV
LCDPTR, #80h OR 0DH
ANL
LCDCONY,#0FEh ; end of data memory
refresh
ORL
LCDCON,#LCDEN ; enable LCD
To set up the same 3.3 V LCD for use with an external resistor
ladder,
; setup LCDCONX for external resistor ladder
MOV
LCDCONX,#EXTRES



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