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ADE5166 数据表(PDF) 102 Page - Analog Devices |
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ADE5166 数据表(HTML) 102 Page - Analog Devices |
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102 / 148 page  ADE5166/ADE5169/ADE5566/ADE5569 Preliminary Technical Data Rev. PrB | Page 102 of 148 ECON—Flash/EE Memory Control SFR Programming flash memory is done through the flash memory control flash control SFR (ECON, 0xB9). This SFR allows the user to read, write, erase, or verify the 62 kB of flash memory. As a method of security, a key must be written to the FLSHKY register to initiate any user access to the flash memory. Upon completion of the flash memory operation, the FLSHKY register is reset such that it must be written prior to another flash memory operation. Requiring the key to be set before an access to the flash memory decreases the likelihood of user code or data being overwritten by a program that has run amuck. The program counter, PC, is held on the instruction where the ECON register is written to until the flash memory controller is done performing the requested operation. Then the PC incre- ments to continue with the next instruction. Any interrupts requests that occur while the flash controller is performing an operation are not handled until the flash operation is complete. All peripherals, such as timers and counters, will continue to operate as configured throughout the flash memory access. Table 95. Flash Control SFR (ECON, 0xB9) Bit Mnemonic Default Value Description 7 to 0 ECON 0 1 Write byte. The value in EDATA is written to the Flash memory, at the page address given by EADRH and EARDL. Note that the byte being addressed must be pre-erased. 2 Erase page. A 512-byte page of Flash memory address is erased. The page is selected by the address in EADRH/L. Any address in the page can be written to EADRH/EADRL to select it for erasure. 3 Erase all. All 62 kB of the available Flash memory are erased. Note that this command is used during serial mode and parallel download mode but should not be executed by user code. 4 Read byte. The byte in the Flash memory, addressed by EADRH/L, is read into EDATA. 5 Reserved. 6 Reserved. 7 Reserved. 8 Protect code (see the Protecting the Flash Memory section). Table 96. Flash Key SFR (FLSHKY, 0xBA) Bit Mnemonic Default Description 7 to 0 FLSHKY 0xFF The content of this SFR is compared to the Flash key, 0x3B. If the two values match the next ECON operation is allowed (see the Protecting the Flash Memory section). Table 97. Flash Protection Key SFR (PROTKY, 0xBB) Bit Mnemonic Default Description 7 to 0 PROTKY 0xFF The content of this SFR is compared to the flash memory location at Address 0xF7EA. If the two values match, the update of the write/erase and read protection set up is allowed (see the Protecting the Flash Memory section). If the protection key in the flash is 0xFF, the PROTKY SFR value is not used for comparison. The PROTKY SFR is also used to write the protection key in the flash. This is done by writing the desired value in PROTKY and writing 0x08 in the ECON SFR. This operation can only be done once. Table 98. Flash Data SFR (EDATA, 0xBC) Bit Mnemonic Default Description 7 to 0 EDATA 0 Flash pointer data. Table 99. Flash Low Byte Address SFR (EADRL, 0xC6) Bit Mnemonic Default Description 7 to 0 EADRL 0 Flash pointer low byte address. Table 100. Flash High Byte Address SFR (EADRH, 0xC7) Bit Mnemonic Default Description 7 to 0 EADRH 0 Flash pointer high byte address. |
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