ADE5166 datasheet(44/148 Pages) AD

44 / 148 page

ADE5166/ADE5169/ADE5566/ADE5569

Preliminary Technical Data

Rev. PrB | Page 44 of 148

Antialiasing Filter

Figure 22 also shows an analog low-pass filter (RC) on the input

to the modulator. This filter is present to prevent aliasing, an

artifact of all sampled systems. Aliasing means that frequency

components in the input signal to the ADC, which are higher

than half the sampling rate of the ADC, appear in the sampled

signal at a frequency below half the sampling rate. Figure 23

illustrates the effect. Frequency components (the black arrows)

above half the sampling frequency (also known as the Nyquist

frequency, that is, 409.6 kHz) are imaged or folded back down

below 409.6 kHz. This happens with all ADCs regardless of the

architecture. In Figure 23, only frequencies near the sampling

frequency (819.2 kHz) move into the band of interest for

metering (40 Hz to 2 kHz). This allows the use of a very simple

LPF (low-pass filter) to attenuate high frequency (near

819.2 kHz) noise and prevents distortion in the band of interest.

For conventional current sensors, a simple RC filter (single-pole

LPF) with a corner frequency of 10 kHz produces an attenuation

of approximately 40 dB at 819.2 kHz (see Figure 23). The 20 dB

per decade attenuation is usually sufficient to eliminate the

effects of aliasing for conventional current sensors. However, for

a di/dt sensor such as a Rogowski coil, the sensor has a 20 dB

per decade gain. This neutralizes the −20 dB per decade attenua-

tion produced by one simple LPF. Therefore, when using a di/dt

sensor, care should be taken to offset the 20 dB per decade gain.

One simple approach is to cascade two RC filters to produce the

−40 dB per decade attenuation needed.

409.6

819.2

FREQUENCY (kHz)

SAMPLING

FREQUENCY

ALIASING EFFECTS

IMAGE

FREQUENCIES

Figure 23. ADC and Signal Processing in Current Channel Outline Dimensions

ADC Transfer Function

Both ADCs in the ADE5166/ADE5169/ADE5566/ADE5569 are

designed to produce the same output code for the same input

signal level. With a full-scale signal on the input of 0.4 V and

an internal reference of 1.2 V, the ADC output code is nominally

2,147,483 or 0x20C49B. The maximum code from the ADC is

±4,194,304; this is equivalent to an input signal level of ±0.794 V.

However, for specified performance, it is recommended that the

full-scale input signal level of 0.4 V not be exceeded.

Current Channel ADC

Figure 24 shows the ADC and signal processing chain for the

current channel. In waveform sampling mode, the ADC outputs

a signed, twos complement, 24-bit data-word at a maximum of

25.6 kSPS (4.096 MHz/160).

With the specified full-scale analog input signal of 0.4 V and

PGA1 = 1, the ADC produces an output code that is approximately

between 0x20C49B (+2,147,483d) and 0xDF3B65 (−2,147,483d).

For inputs of 0.25 V, 0.125 V, 82.6 mV, and 31.3 mV with PGA1 = 2,

4, 8, and 16, respectively, the ADC produces an output code that

is approximately between 0x28F5C2 (+2,684,354d) and 0xD70A3E

(–2,684,354d).

PGA1

ADC

REFERENCE

×1, ×2, ×4

×8, ×16

{GAIN[2:0]}

HPF

DIGITAL

INTEGRATOR*

MODE1[5]

CURRENT RMS (Irms)

CALCULATION

WAVEFORM SAMPLE

ACTIVE AND REACTIVE

POWER CALCULATION

ANALOG

INPUT

RANGE

0.25V, 0.125V,

62.5mV, 31.3mV

CURRENT CHANNEL

WAVEFORM

DATA RANGE

0x28F5C2

0x000000

0xD70A3E

CURRENT CHANNEL

WAVEFORM

DATA RANGE AFTER

INTEGRATOR (50Hz)

0x342CD0

0x000000

0xCBD330

CURRENT CHANNEL

WAVEFORM

DATA RANGE AFTER

INTEGRATOR (60Hz)

0x2B7850

0x000000

0xD487B0

60Hz

50Hz

*WHEN DIGITAL INTEGRATOR IS ENABLED, FULL-SCALE OUTPUT DATA IS ATTENUATED

DEPENDING ON THE SIGNAL FREQUENCY BECAUSE THE INTEGRATOR HAS A –20dB/DECADE

FREQUENCY RESPONSE. WHEN DISABLED, THE OUTPUT IS NOT FURTHER ATTENUATED.

PGA1 = 1 IS NOT RECOMMENDED IN THE ADE5166 AND ADE5169.

Figure 24. ADC and Signal Processing in Current Channel with PGA1 = 1, 2, 4, 8, or 16 for ADE5566 and ADE5569

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