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ADE5166 数据表(PDF) 40 Page - Analog Devices |
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ADE5166 数据表(HTML) 40 Page - Analog Devices |
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40 / 148 page  ADE5166/ADE5169/ADE5566/ADE5569 Preliminary Technical Data Rev. PrB | Page 40 of 148 Bit Mnemonic Default Description 2 to 0 PGA1[2:0] 000 These bits define the current channel input gain. PGA1[2:0] Result 000 Gain = 11 001 Gain = 2 010 Gain = 4 011 Gain = 8 100 Gain = 16 1 This gain is not recommended in the ADE5166 and ADE5169 because it can create an overranging of the ADC when both current inputs are in opposite phase. Table 38. Mode 3 Register (MODE30x2B) Bit No. Mnemonic Default Description 7 to 2 Reserved 0 Reserved 1 ZX1 0 Setting this bit enables the zero crossing output signal on P1.2 0 ZX2 0 Setting this bit enables the zero crossing output signal on P0.5 Table 39. Calibration Mode Register (CALMODE, 0x3D)1 Bit Mnemonic Default Description 7 to 6 Reserved 0 These bits should be kept cleared for proper operation. 5 to 4 SEL_I_CH[1:0] 0 These bits define the current channel used for energy measurements. SEL_I_CH[1:0] Result 00 Current channel automatically selected by the tampering condition 01 Current channel connected to IPA 10 Current channel connected to IPB 11 Current channel automatically selected by the tampering condition 3 V_CH_SHORT 0 Logic one short voltage channel to ground. 2 I_CH_SHORT 0 Logic one short Current channels to ground. 1 to 0 Reserved 0 These bits should be kept clear for proper operation. 1 This register is not available in the ADE5566 and ADE5569. INTERRUPT STATUS/ENABLE SFRS Table 40. Interrupt Status 1 SFR (MIRQSTL, 0xDC) Bit Interrupt Flag Description 7 ADEIRQFLAG This bit is set if any of the ADE status flags that are enabled to generate an ADE interrupt are set. This bit is automatically cleared when all of the enabled ADE status flags are cleared. 6 Reserved Reserved. 5 FAULTSIGN1 Logic 1 indicates that the fault mode has changed according to the configuration of the ACCMODE register. 4 VARSIGN2 Logic 1 indicates that the reactive power sign has changed according to the configuration of the ACCMODE register. 3 APSIGN Logic 1 indicates that the active power sign has changed according to the configuration of the ACCMODE register. 2 VANOLOAD Logic 1 indicates that an interrupt has been caused by apparent power no load detection. This interrupt is also used to reflect the part entering the Irms no load mode. 1 RNOLOAD2 Logic 1 indicates that an interrupt has been caused by reactive power no load detection. 0 APNOLOAD Logic 1 indicates that an interrupt has been caused by active power no load detection. 1 This function is not available in the ADE5566 and ADE5569. 2 This function is not available in the ADE5566 and ADE5166. |
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