ADE5166 datasheet(24/148 Pages) AD

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ADE5166/ADE5169/ADE5566/ADE5569

Preliminary Technical Data

Rev. PrB | Page 24 of 148

POWER SUPPLY ARCHITECTURE

Each ADE5166/ADE5169/ADE5566/ADE5569 has two power

supply inputs, VDD and VBAT, and require only a single 3.3 V power

supply at VDD for full operation. A battery backup, or secondary

power supply, with a maximum of 3.7 V can be connected to

the VBAT input. Internally, the ADE5166/ADE5169/ADE5566/

ADE5569 connect VDD or VBAT to VSWOUT, which is used to derive

power for the ADE5166/ADE5169/ADE5566/ADE5569 circuitry.

The VSWOUT output pin reflects the voltage at the internal

power supply (VSWOUT) and has a maximum output current of 6

mA. This pin can also be used to power a limited number of

peripheral components. The 2.5 V analog supply (VINTA) and the

2.5 V supply for the core logic (VINTD) are derived by on-chip

linear regulators from VSWOUT. Figure 10 shows the power supply

architecture of ADE5166/ADE5169/ADE5566/ADE5569.

The ADE5166/ADE5169/ADE5566/ADE5569 provide

automatic battery switchover between VDD and VBAT based on

the voltage level detected at VDD or VDCIN. Additionally, the

BCTRL input can be used to trigger a battery switchover. The

conditions for switching VSWOUT from VDD to VBAT and back to

VDD are described in the Battery Switchover section. VDCIN is an

input pin that can be connected to a 0 V to 3.3 V dc signal. This

input is intended for power supply supervisory purposes and

does not provide power to the ADE5166/ADE5169/ADE5566/

ADE5569 circuitry (see the Battery Switchover section).

POWER SUPPLY

MANAGEMENT

LDO

VINTD

LDO

VINTA

ADC

VSW

ADC

SCRATCHPAD

LCD

RTC

TEMPERATURE ADC

3.3V

MCU

ADE

SPI/I2C

UART

2.5V

VDCIN VDD VBAT

VSWOUT

BCTRL

Figure 10. Power Supply Architecture

BATTERY SWITCHOVER

The ADE5166/ADE5169/ADE5566/ADE5569 monitor VDD,

VBAT, and VDCIN. Automatic battery switchover from VDD to VBAT

can be configured based on the status of VDD, VDCIN, or the

BCTRL pin. Battery switchover is enabled by default. Setting Bit 1

in the battery switchover configuration SFR (BATPR, 0xF5)

disables battery switchover so that VDD is always connected to

VSWOUT (see Table 18). The source of VSWOUT is indicated by Bit 6 in

the peripheral configuration SFR (PERIPH, 0xF4), which is

described in Table 19. Bit 6 is set when VSWOUT is connected to

VDD and cleared when VSWOUT is connected to VBAT.

The battery switchover functionality provided by the ADE5166/

ADE5169/ADE5566/ADE5569 allows a seamless transition

from VDD to VBAT. An automatic battery switchover option

ensures a stable power supply to the ADE5166/ADE5169/

ADE5566/ADE5569, as long as the external battery voltage is

above 2.75 V. It allows continuous code execution even while

the internal power supply is switching from VDD to VBAT and

back. Note that the energy metering ADCs are not available

when VBAT is being used for VSWOUT.

Power supply management (PSM) interrupts can be enabled to

indicate when battery switchover occurs and when the VDD

power supply is restored (see the Power Supply Management

Interrupt (PSM) section.)

VDD to VBAT

The following three events switch the internal power supply

(VSWOUT) from VDD to VBAT:

•

VDCIN < 1.2 V. When VDCIN falls below 1.2 V, VSWOUT switches

from VDD to VBAT. This event is enabled when the

BATPRG[1:0] bits in the battery switchover configuration

SFR (BATPR, 0xF5) = 0b01. Setting these bits disables

switchover based on VDCIN. Battery switchover on low VDCIN is

disabled by default.

•

VDD < 2.75 V. When VDD falls below 2.75 V, VSWOUT switches

from VDD to VBAT. This event is enabled when BATPRG[1:0] in

the BATPR SRF are cleared.

•

Falling edge on BCTRL. When the battery control pin,

BCTRL, goes low, VSWOUT switches from VDD to VBAT. This

external switchover signal can trigger a switchover to VBAT

at any time. Setting Bits INT1PRG[4:2] to 0bx01 in the

interrupt pins configuration SFR (INTPR, 0xFF) enables

the battery control pin (see Table 16).

Switching from VBAT to VDD

To switch VSWOUT from VBAT to VDD, all of the following events

that are enabled to force battery switchover must be false:

•

VDCIN < 1.2 V and VDD < 2.75 V enabled. If the low VDCIN

condition is enabled, VSWOUT switches to VDD after VDCIN

remains above 1.2 V and VDD remains above 2.75 V.

•

VDD < 2.75 V enabled. VSWOUT switches back to VDD after

VDD remains above 2.75 V.

•

BCTRL enabled. VSWOUT switches back to VDD after BCTRL

is high, and the first or second bullet point is satisfied.

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