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HD64F2149YV 数据表(PDF) 726 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 726 Page - Renesas Technology Corp |
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726 / 1075 page ![]() Section 22 ROM Rev. 3.00 Jan 18, 2006 page 698 of 1044 REJ09B0280-0300 Writes to the EV and PV bits in FLMCR1 are enabled only when SWE=1; writes to the E bit only when SWE = 1, and ESU = 1; and writes to the P bit only when SWE = 1, and PSU = 1. Bit 7—Flash Write Enable (FWE): Sets hardware protection against flash memory programming/erasing. This bit cannot be modified and is always read as 1. Bit 6—Software Write Enable (SWE): Enables or disables flash memory programming. SWE should be set before setting bits ESU, PSU, EV, PV, E, P, and EB7 to EB0, and should not be cleared at the same time as these bits. Bit 6 SWE Description 0 Writes disabled (Initial value) 1 Writes enabled Bit 5 and 4—Reserved: These bits cannot be modified and are always read as 0. Bit 3—Erase-Verify (EV): Selects erase-verify mode transition or clearing. Do not set the SWE, ESU, PSU, PV, E, or P bit at the same time. Bit 3 EV Description 0 Erase-verify mode cleared (Initial value) 1 Transition to erase-verify mode [Setting condition] When SWE = 1 Bit 2—Program-Verify (PV): Selects program-verify mode transition or clearing. Do not set the SWE, ESU, PSU, EV, E, or P bit at the same time. Bit 2 PV Description 0 Program-verify mode cleared (Initial value) 1 Transition to program-verify mode [Setting condition] When SWE = 1 |
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