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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HD64F2149YV 数据表(PDF) 206 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 206 Page - Renesas Technology Corp |
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206 / 1075 page  Section 7 Data Transfer Controller Rev. 3.00 Jan 18, 2006 page 178 of 1044 REJ09B0280-0300 7.3 Operation 7.3.1 Overview When activated, the DTC reads register information that is already stored in memory and transfers data on the basis of that register information. After the data transfer, it writes updated register information back to memory. Pre-storage of register information in memory makes it possible to transfer data over any required number of channels. Setting the CHNE bit to 1 makes it possible to perform a number of transfers with a single activation. Figure 7.2 shows a flowchart of DTC operation. Start Read DTC vector Next transfer Read register information Data transfer Write register information Clear activation flag CHNE = 1? End No No Yes Yes Transfer counter = 0 or DISEL = 1? Clear DTCER Interrupt exception handling Figure 7.2 Flowchart of DTC Operation |
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