HD64F2149YV datasheet(207/1075 Pages) RENESAS

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Section 7 Data Transfer Controller

Rev. 3.00 Jan 18, 2006 page 179 of 1044

REJ09B0280-0300

The DTC transfer mode can be normal mode, repeat mode, or block transfer mode.

The 24-bit SAR designates the DTC transfer source address and the 24-bit DAR designates the

transfer destination address. After each transfer, SAR and DAR are independently incremented,

decremented, or left fixed.

Table 7.2 outlines the functions of the DTC.

Table 7.2

DTC Functions

Address Registers

Transfer Mode

Activation Source

Transfer

Source

Transfer

Destination

• Normal mode

 One transfer request transfers one

byte or one word

 Memory addresses are incremented

or decremented by 1 or 2

 Up to 65,536 transfers possible

• Repeat mode

 One transfer request transfers one

byte or one word

 Memory addresses are incremented

or decremented by 1 or 2

 After the specified number of

transfers

(1 to 256), the initial state resumes

and operation continues

• Block transfer mode

 One transfer request transfers a

block

of the specified size

 Block size is from 1 to 256 bytes or

words

 Up to 65,536 transfers possible

 A block area can be designated at

either the source or destination

• IRQ

• FRT ICI, OCI

• 8-bit timer CMI

• Host interface IBF

• SCI TXI or RXI

• A/D converter ADI

• IIC IICI

• Software

24 bits

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