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HD64F2149YV 数据表(PDF) 258 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 258 Page - Renesas Technology Corp |
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258 / 1075 page ![]() Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 230 of 1044 REJ09B0280-0300 8.7.2 Register Configuration Table 8.12 shows the port 6 register configuration. Table 8.12 Port 6 Registers Name Abbreviation R/W Initial Value Address* 1 Port 6 data direction register P6DDR W H'00 H'FFB9 Port 6 data register P6DR R/W H'00 H'FFBB Port 6 MOS pull-up control register KMPCR R/W H'00 H'FFF2* 2 System control register SYSCR2 R/W H'00 H'FF83 Notes: 1. Lower 16 bits of the address. 2. KMPCR has the same address as TICRR/TCORAY of TMRX/TMRY. To select KMPCR, set the HIE bit to 1 in SYSCR and set the MSTP2 bit to 0 in MSTPCRL. Port 6 Data Direction Register (P6DDR) 7 P67DDR 0 W 6 P66DDR 0 W 5 P65DDR 0 W 4 P64DDR 0 W 3 P63DDR 0 W 0 P60DDR 0 W 2 P62DDR 0 W 1 P61DDR 0 W Bit Initial value Read/Write P6DDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port 6. P6DDR cannot be read; if it is, an undefined value will be returned. Setting a P6DDR bit to 1 makes the corresponding port 6 pin an output pin, while clearing the bit to 0 makes the pin an input pin. P6DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in software standby mode. |
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