HD64F2149YV datasheet(259/1075 Pages) RENESAS

259 / 1075 page

Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 231 of 1044

REJ09B0280-0300

Port 6 Data Register (P6DR)

P67DR

R/W

P66DR

R/W

P65DR

R/W

P64DR

R/W

P63DR

R/W

P60DR

R/W

P62DR

R/W

P61DR

R/W

Bit

Initial value

Read/Write

P6DR is an 8-bit readable/writable register that stores output data for the port 6 pins (P67 to P60).

If a port 6 read is performed while P6DDR bits are set to 1, the P6DR values are read directly,

regardless of the actual pin states. If a port 6 read is performed while P6DDR bits are cleared to 0,

the pin states are read.

P6DR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode.

Port 6 MOS Pull-Up Control Register (KMPCR)

Bit

765

432

KM7PCR KM6PCR KM5PCR KM4PCR KM3PCR KM2PCR KM1PCR KM0PCR

Initial value

000

Read/Write

R/W

KMPCR is an 8-bit readable/writable register that controls the port 6 built-in MOS input pull-ups

on a bit-by-bit basis.

The MOS input pull-up is turned on when a KMPCR bit is set to 1 while the corresponding

P6DDR bit is cleared to 0 (input port setting).

KMPCR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode.

HD64F2149YV 数据表(PDF) 259 Page - Renesas Technology Corp

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