HD64F2149YV datasheet(278/1075 Pages) RENESAS

部件名	HD64F2149YV

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

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制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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278 / 1075 page

Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 250 of 1044

REJ09B0280-0300

8.11.2

Table 8.20 summarizes the port A registers.

Table 8.20

Port A Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port A data direction register

PADDR

H'00

H'FFAB*

Port A output data register

PAODR

R/W

H'00

H'FFAA

Port A input data register

PAPIN

Undefined

H'FFAB*

Notes: 1. Lower 16 bits of the address.

2. PADDR and PAPIN have the same address.

Port A Data Direction Register (PADDR)

Bit

543210

PA7DDR PA6DDR PA5DDR PA4DDR PA3DDR PA2DDR PA1DDR PA0DDR

Initial value

000000

Read/Write

WWWWWW

PADDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port A.

Setting a PADDR bit to 1 makes the corresponding port A pin an output pin, while clearing the bit

to 0 makes the pin an input pin.

PADDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode.

HD64F2149YV 数据表(PDF) 278 Page - Renesas Technology Corp

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