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HD64F2149YV 数据表(PDF) 276 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 276 Page - Renesas Technology Corp |
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276 / 1075 page ![]() Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 248 of 1044 REJ09B0280-0300 Pin Selection Method and Pin Functions P91/ IRQ1 P91DDR 0 1 Pin function P91 input pin P91 output pin IRQ1 input pin When bit IRQ1E in IER is set to 1, this pin is used as the IRQ1 input pin. P90/ LWR/IRQ2/ ADTRG/ECS2 The pin function is switched as shown below according to the combination of operating mode, bit ABW in WSCR, bits HI12E and CS2E in SYSCR2, bit FGA20E in HICR, and bit P90DDR. Operating mode Mode 1, modes 2 and 3 (EXPE = 1) Modes 2, 3 (EXPE = 0) ABW 0 1 — HI12E — Any one 0 1 FGA20E — 1 CS2E — 1 P90DDR — 0 101 — Pin function LWR output pin P90 input pin P90 output pin P90 input pin P90 output pin ECS2 input pin IRQ2 input pin, ADTRG input pin When the IRQ2E bit in IER is set to 1 in mode 1, modes 2 and 3 (EXPE = 1) with the ABW bit in WSCR set to 1, or in mode 2 and 3 (EXPE = 0), this pin is used as the IRQ2 input pin. When TRGS1 and TRGS0 in ADCR of the A/D converter are both set to 1, this pin is used as the ADTRG input pin. |
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