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HD64F2149YV 数据表(PDF) 319 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 319 Page - Renesas Technology Corp |
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319 / 1075 page ![]() Section 9 8-Bit PWM Timers Rev. 3.00 Jan 18, 2006 page 291 of 1044 REJ09B0280-0300 9.3 Operation 9.3.1 Correspondence between PWM Data Register Contents and Output Waveform The upper 4 bits of PWDR specify the duty cycle of the basic pulse as 0/16 to 15/16 with a resolution of 1/16, as shown in table 9.4. Table 9.4 Duty Cycle of Basic Pulse 01234567 8 9 A B C D E F 0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Upper 4 Bits Basic Pulse Waveform (Internal) |
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