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HD64F2149YV 数据表(PDF) 323 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 323 Page - Renesas Technology Corp |
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323 / 1075 page ![]() Section 10 14-Bit PWM Timer Rev. 3.00 Jan 18, 2006 page 295 of 1044 REJ09B0280-0300 10.1.3 Pin Configuration Table 10.1 lists the pins used by the PWM (D/A) module. Table 10.1 Input and Output Pins Name Abbreviation I/O Function PWM output pin 0 PWX0 Output PWM output, channel A PWM output pin 1 PWX1 Output PWM output, channel B 10.1.4 Register Configuration Table 10.2 lists the registers of the PWM (D/A) module. Table 10.2 Register Configuration Name Abbreviation R/W Initial value Address* 1 PWM (D/A) control register DACR R/W H'30 H'FFA0* 2 PWM (D/A) data register A high DADRAH R/W H'FF H'FFA0* 2 PWM (D/A) data register A low DADRAL R/W H'FF H'FFA1* 2 PWM (D/A) data register B high DADRBH R/W H'FF H'FFA6* 2 PWM (D/A) data register B low DADRBL R/W H'FF H'FFA7* 2 PWM (D/A) counter high DACNTH R/W H'00 H'FFA6* 2 PWM (D/A) counter low DACNTL R/W H'03 H'FFA7* 2 Module stop control register MSTPCRH R/W H'3F H'FF86 MSTPCRL R/W H'FF H'FF87 Notes: 1. Lower 16 bits of the address. 2. Some of the PWM registers are located in the same addresses as other registers, switching is made by setting IICE bit in serial/timer control register (STCR). The same addresses are shared by DADRAH and DACR, and by DADRB and DACNT. Switching is performed by the REGS bit in DACNT or DADRB. |
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