数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

ADV7341 数据表(PDF) 37 Page - Analog Devices

部件名 ADV7341
功能描述  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video DACS
PDF  108 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7341 数据表(HTML) 37 Page - Analog Devices

Back Button ADV7341_15 Datasheet HTML 33Page - Analog Devices ADV7341_15 Datasheet HTML 34Page - Analog Devices ADV7341_15 Datasheet HTML 35Page - Analog Devices ADV7341_15 Datasheet HTML 36Page - Analog Devices ADV7341_15 Datasheet HTML 37Page - Analog Devices ADV7341_15 Datasheet HTML 38Page - Analog Devices ADV7341_15 Datasheet HTML 39Page - Analog Devices ADV7341_15 Datasheet HTML 40Page - Analog Devices ADV7341_15 Datasheet HTML 41Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 37 / 108 page
background image
Data Sheet
ADV7340/ADV7341
Rev. C | Page 37 of 108
Table 23. Register 0x34 to Register 0x35
SR7 to
Bit Number
Reset
SR0
Register
Bit Description
7
6
5
4
3
2
1
0
Register Setting
Value
0x34
ED/HD Mode
Register 5
ED/HD timing reset
0
Internal ED/HD timing counters enabled
0x48
1
Resets the internal ED/HD timing counters
ED/HD HSYNC control1
0
HSYNC output control (refer to
Table 56)
1
ED/HD VSYNC control1
0
VSYNC output control (refer to
Table 57)
1
ED/HD blank polarity
0
P_BLANK active high
1
P_BLANK active low
ED Macrovision® enable
0
Macrovision disabled
1
Macrovision enabled
Reserved
0
0 must be written to this bit
ED/HD VSYNC/field input
0
0 = field input
1
1 = VSYNC input
Horizontal/vertical counters2
0
Update field/line counter
1
Field/line counter free running
0x35
ED/HD Mode
Register 6
Reserved
0
0x00
ED/HD RGB input enable
0
Disabled.
1
Enabled
ED/HD sync on PrPb
0
Disabled
1
Enabled
ED/HD color DAC swap
0
DAC 2 = Pb, DAC 3 = Pr
1
DAC 2 = Pr, DAC 3 = Pb
ED/HD gamma correction
curve select
0
Gamma Correction Curve A
1
Gamma Correction Curve B
ED/HD gamma correction
enable
0
Disabled
1
Enabled
ED/HD adaptive filter mode
0
Mode A
1
Mode B
ED/HD adaptive filter enable
0
Disabled.
1
Enabled
1
Used in conjunction with ED/HD sync output enable in Subaddress 0x02, Bit 7 = 1.
2
When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com