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ADV7341 数据表(PDF) 60 Page - Analog Devices

部件名 ADV7341
功能描述  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video DACS
PDF  108 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7341 数据表(HTML) 60 Page - Analog Devices

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ADV7340/ADV7341
Data Sheet
Rev. C | Page 60 of 108
On power-up, the CSC matrix is programmed with the default
values shown in Table 49.
Table 49. ED/HD Manual CSC Matrix Default Values
Subaddress
Default
0x03
0x03
0x04
0xF0
0x05
0x4E
0x06
0x0E
0x07
0x24
0x08
0x92
0x09
0x7C
When the ED/HD manual CSC matrix adjust feature is enabled,
the default coefficient values in Subaddress 0x03 to Subaddress
0x09 are correct for the HD color space only. The color com-
ponents are converted according to the following 1080i and
720p standards (SMPTE 274M, SMPTE 296M):
R = Y + 1.575Pr
G = Y − 0.468Pr − 0.187Pb
B = Y + 1.855Pb
The conversion coefficients should be multiplied by 315 before
being written to the ED/HD CSC matrix registers. This is
reflected in the default values for GY = 0x13B, GU = 0x03B,
GV = 0x093, BU = 0x248, and RV = 0x1F0.
If the ED/HD manual CSC matrix adjust feature is enabled and
another input standard (such as ED) is used, the scale values for
GY, GU, GV, BU, and RV must be adjusted according to this
input standard color space. The user should consider that the
color component conversion may use different scale values.
For example, SMPTE 293M uses the following conversion:
R = Y + 1.402Pr
G = Y – 0.714Pr – 0.344Pb
B = Y + 1.773Pb
The programmable CSC matrix is used for external ED/HD
pixel data and is not functional when internal test patterns are
enabled.
Programming the CSC Matrix
If custom manipulation of the ED/HD CSC matrix coefficients
is required for a YCrCb-to-RGB color space conversion, use the
following procedure:
1. Enable the ED/HD manual CSC matrix adjust feature
(Subaddress 0x02, Bit 3).
2. Set the output to RGB (Subaddress 0x02, Bit 5).
3. Disable sync on PrPb (Subaddress 0x35, Bit 2).
4. Enable sync on RGB (optional) (Subaddress 0x02, Bit 4).
The GY value controls the green signal output level, the BU
value controls the blue signal output level, and the RV value
controls the red signal output level.
SD LUMA AND COLOR SCALE CONTROL
Subaddress 0x9C to Subaddress 0x9F
When enabled, the SD luma and color scale control feature can
be used to scale the SD Y, Cb, and Cr output levels. This feature
can be enabled using Subaddress 0x87, Bit 0. This feature affects
all SD output signals, that is, CVBS, Y-C, YPrPb, and RGB.
When enabled, three 10-bit registers (SD Y scale, SD Cb scale,
and SD Cr scale) control the scaling of the SD Y, Cb, and Cr
output levels. The SD Y scale register contains the scaling factor
used to the scale the Y level from 0.0 to 1.5 times its initial level.
The SD Cb scale and SD Cr scale registers contain the scaling
factors to scale the Cb and Cr levels from 0.0 to 2.0 times their
initial levels, respectively.
The values to be written to these 10-bit registers are calculated
using the following equation:
Y, Cb, or Cr Scale Value = Scale Factor × 512
For example, if Scale Factor = 1.3
Y, Cb, or Cr Scale Value = 1.3 × 512 = 665.6
Y, Cb, or Cr Scale Value = 666 (rounded to the nearest integer)
Y, Cb, or Cr Scale Value = 1010 0110 10b
Subaddress 0x9C, SD scale LSB register = 0x2A
Subaddress 0x9D, SD Y scale register = 0xA6
Subaddress 0x9E, SD Cb scale register = 0xA6
Subaddress 0x9F, SD Cr scale register = 0xA6
It is recommended that the SD luma scale saturation feature
(Subaddress 0x87, Bit 1) be enabled when scaling the Y output
level to avoid excessive Y output levels.
SD HUE ADJUST CONTROL
Subaddress 0xA0
When enabled, the SD hue adjust control register (Subaddress
0xA0) is used to adjust the hue on the SD composite and chroma
outputs. This feature can be enabled using Subaddress 0x87, Bit 2.
Subaddress 0xA0 contains the bits required to vary the hue of
the video data, that is, the variance in phase of the subcarrier
during active video with respect to the phase of the subcarrier
during the color burst. The ADV7340/ADV7341 provide a
range of ±22.5° in increments of 0.17578125°. For normal
operation (zero adjustment), this register is set to 0x80. Value
0xFF and Value 0x00 represent the upper and lower limits,
respectively, of the attainable adjustment in NTSC mode. Value
0xFF and Value 0x01 represent the upper and lower limits,
respectively, of the attainable adjustment in PAL mode.



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