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ADV7341 数据表(PDF) 11 Page - Analog Devices

部件名 ADV7341
功能描述  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video DACS
PDF  108 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV7341 数据表(HTML) 11 Page - Analog Devices

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Data Sheet
ADV7340/ADV7341
Rev. C | Page 11 of 108
MPU PORT TIMING SPECIFICATIONS
VDD = 1.71 V to 1.89 V. PVDD = 1.71 V to 1.89 V. VAA = 2.6 V to 3.465 V. VDD_IO = 1.71 V to 3.63 V.
All specifications TMIN to TMAX (−40°C to +85°C), unless otherwise noted.
Table 10.
Parameter
Conditions
Min
Typ
Max
Unit
MPU PORT, I2C MODE1
See Figure 19
SCL Frequency
0
400
kHz
SCL High Pulse Width, t1
0.6
µs
SCL Low Pulse Width, t2
1.3
µs
Hold Time (Start Condition), t3
0.6
µs
Setup Time (Start Condition), t4
0.6
µs
Data Setup Time, t5
100
ns
SDA, SCL Rise Time, t6
300
ns
SDA, SCL Fall Time, t7
300
ns
Setup Time (Stop Condition), t8
0.6
µs
1
Guaranteed by characterization.
POWER SPECIFICATIONS
VDD = 1.8 V, PVDD = 1.8 V, VAA = 3.3 V, VDD_IO = 3.3 V, TA = 25°C.
Table 11.
Parameter
Conditions
Min
Typ
Max
Unit
NORMAL POWER MODE1, 2
IDD3
SD only (16× oversampling)
90
mA
ED only (8× oversampling)4
65
mA
HD only (4× oversampling)4
91
mA
SD (16× oversampling) and ED (8× oversampling)
95
mA
SD (16× oversampling) and HD (4× oversampling)
122
mA
IDD_IO
1
mA
IAA5
Three DACs enabled (ED/HD only)
124
mA
Six DACs enabled (SD only and simultaneous modes )
140
mA
IPLL
SD only, ED only, or HD only modes
5
mA
Simultaneous modes
10
mA
SLEEP MODE
IDD
5
µA
IAA
0.3
µA
IDD_IO
0.2
µA
IPLL
0.1
µA
1
RSET1 = 510 Ω (DAC 1, DAC 2, and DAC 3 operating in full-drive mode). RSET2 = 4.12 kΩ (DAC 4, DAC 5, and DAC 6 operating in low-drive mode).
2
75% color bar test pattern applied to pixel data pins.
3
IDD is the continuous current required to drive the digital core.
4
Applicable to both single data rate (SDR) and dual data rate (DDR) input modes.
5
IAA is the total current required to supply all DACs.



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