RM0352 datasheet(70/138 Pages) STMICROELECTRONICS

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System timer (SysTick)

RM0352

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DocID024647 Rev 1

Reset:

0x80000000

Description:

SysTick calibration value register

9.4

Configuring SysTick

To configure the SysTick you need to load the SysTick reload value register with the interval

required between SysTick events. The timer interrupt or COUNTFLAG bit (in the SysTick

control and status register) is activated on the transition from 1 to 0, therefore it activates

every n + 1 clock ticks (the SysTick clock is the CPU clock). If a period of 100 is required, 99

should be written to the SysTick reload value register. The SysTick reload value register

supports values between 1 and 0x00FFFFFF.

If you want to use the SysTick to generate an event at a timed interval, for example 1 ms,

you can use the SysTick calibration value register to scale your value for the reload register.

The SysTick calibration value register is a read-only register that contains the number of

pulses for a period of 10 ms, in the TENMS field (bits 0 to 23). This register also has

a SKEW bit (30) that is used to indicate that the calibration for 10 ms in the TENMS section

is not exactly 10 ms due to small variations in clock frequency. Bit 31 is used to indicate if

the reference clock is provided.

The control and status register allows you to select between polling the timer by reading

COUNTFLAG (bit 16), or by the SysTick generating an interrupt.

By default the SysTick is configured for polling mode. In this mode, user code must read

COUNTFLAG to ascertain if the SysTick event had occurred. This is indicated by

COUNTFLAG being set. Reading of the control and status register clears the COUNTFLAG

bit. To configure the SysTick to generate an interrupt you must set TICKINT (bit 1 of the

SysTick control and status register) HIGH. You will also need to enable the appropriate

interrupt in the Nested Vector Interrupt Controller (NVIC). You must keep CLKSOURCE (bit

2) to 1 to select the core clock.

The Timer is enabled by setting bit 0 of the SysTick Status and control register. For more

details about SysTick registers, see

“Cortex-M0 Devices Generic User Guide”.

[31] NOREF: read as one indicates that no separate reference clock is provided.

[30] SKEW: read as one indicates calibration value for the 10 ms inexact timing is

not known. This may affect the suitability of the SysTick as a software real-

time clock.

[29:24]

RESERVED

[23:0]

TENMS: contains the number of ticks to generate a 10 ms interval.

Read as zero indicates calibration value is not known.

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