RM0352 datasheet(19/138 Pages) STMICROELECTRONICS

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RM0352

GPIO

137

GPIO

The Brain device proposes 11 programmable I/Os.

Each GPIO provides one programmable input or output that can be controlled in three

modes:

•

GPIO Port mode: direction and data are programmed through registers (see

Table 5:

GPIO configuration registers)

•

Serial 0 and Serial 1 modes: the GPIO becomes a peripheral input or output line (see

Table 4: GPIO alternate options)

Each GPIO can generate an interrupt independently to the selected mode. Interrupts are

generated depending on a level or edge. (See

Table 5: GPIO configuration registers and

Table 6: Edge/level and rising/falling edge interrupt configuration for more details).

The base address of the GPIO block in the Brain memory map is 0xA000_0000.

Table 4. GPIO alternate options(1) (2) (3)

The white color covers resources dedicated to the fix 1.8 V power supply while the gray one are pin

resources on the wide range from 1.8 V to 3.3 V power supply.

In serial mode 0, I/O 3 MUST be configured as an I

C mode pad (i.e. I2C_CONF[1] = 1).

In serial mode 1 and GPIO port mode, IO3 MUST be configured as normal mode (I2C_CONF[1] = 0).

After reset, IO6 outputs the 80 MHz clock divided by five.

no.

Ref.

Pull

Serial mode 0

Serial mode 1

GPIO port mode

GPIO_MODE_W = “00” GPIO_MODE_W = “01” GPIO_MODE_W = “10”

Type

Signal

Type

Signal

Type

Signal

IO0

Down

I/O

SW_TDIO/

JTAG TMS

UART_CTS

I/O

GPIO0

IO1

Down

SW_TCK/J

TAG TCK

UART_RTS

I/O

GPIO1

4IO2

C2_SCL

UART_TXD

I/O

GPIO2

IO3

Down

I/O

C2_SDA

UART_RXD

I/O

GPIO3

IO4

Down

JTAG TDO

I/O

GPIO4

IO5

Down

JTAG TDI

I/O

GPIO5

IO8

I/O

C1 SDA

SPI_OUT

I/O

GPIO8

IO6

Down

Divided

CLK80M

CLK32K

I/O

GPIO6

IO7

I/O

C1 SCL

I/O

SPI_CLK

I/O

GPIO7

IO10

Down

SPI_IN

I/O

GPIO10

IO9

SPI_CS

I/O

GPIO9

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RM0352 数据表(PDF) 19 Page - STMicroelectronics

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