RM0352 datasheet(96/138 Pages) STMICROELECTRONICS

96 / 138 page

I2C bus interface

RM0352

96/138

DocID024647 Rev 1

10.2.18

I2C peripheral identification register 0 (I2C_PERIPHID0)

Table 88. I2C peripheral identification register 0 (I2C_PERIPHID0)

Address:

I2CBaseAddress + 0xFE0

Type:

Reset:

0x00000024

Description:

The I2C_PERIPHID0-3 registers are four 8-bit registers, that span address

location 0xFE0 to 0xFEC. The registers are read-only.

10.2.19

I2C peripheral identification register 1 (I2C_PERIPHID1)

Table 89. I2C peripheral identification register 1 (I2C_PERIPHID1)

Address:

I2CBaseAddress + 0xFE4

Type:

Reset:

0x00000000

Description:

C peripheral identification register 1.

[7:1]

DSA7: slave address in dual addressing mode.

[0]

DUAL: dual addressing mode enable.

0: only SA7 is recognized in 7-bit addressing mode.

1: both SA7 and DSA7 are recognized in 7-bit addressing mode.

I2C peripheral identification register 0 (I2C_PERIPHID0)

31 30

21 20 19

RESERVED

PARTNUMBER0

[7:0]

PARTNUMBER0: these bits read back as 0x024.

I2C peripheral identification register 1 (I2C_PERIPHID1)

31 30

29 28

27 26 25 24 23 22 21 20 19 18

17 16 15 14 13

12 11 10

RESERVED

DESIGNER0

PARTNUMBER1

[7:4] DESIGNER0: these bits read back as 0x80.

[3:0]

PARTNUMBER1: these bits read back as 0x024.

RM0352 数据表(PDF) 96 Page - STMicroelectronics

RM0352 数据表(HTML) 96 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载