RM0312 datasheet(69/275 Pages) STMICROELECTRONICS

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RM0312

Power management

9.4

Low power modes

By default, the microcontroller is in run mode after a system or power reset. However the

device supports three low power modes to achieve the best compromise between low

power consumption, short startup time and available wakeup sources:

– Wait mode: The CPU clock is stopped, but selected peripherals keep running. An

internal or external interrupt or a Reset can be used to exit the microcontroller from

Wait mode. Refer to Section 9.4.1: Wait mode on page 70

– Active-halt mode: The CPU and peripheral clocks are stopped, except LSI. The

wakeup can be triggered by AWU or PXS interrupts, external interrupts or reset.

– Halt mode: The CPU and peripheral clocks are stopped, the device remains powered

on. The wakeup is triggered by an external interrupt or reset. A few peripherals also

have wakeup from Halt capability.

The main characteristics of the three low power modes are summarized in Table 17.

In addition, the power consumption in Run mode can be reduced by one of the following

means:

– Slowing down the system clocks

– Gating the peripherals clocks when they are unused

Refer to Section 9.2: Managing the clock for low consumption on page 68.

Table 17. Low power mode management

Mode

(consumption

level)

Main voltage

regulator

(MVR)

Oscillators

CPU

Peripherals

Wakeup trigger event

Wait

( - )

WFI

OFF

ON(1)

All internal or external

interrupts, reset

WFE ON

OFF

ON(1)

All internal or external

interrupts(2), WFE

events, reset

Active-halt

( - - )

AWU

OFF

(LPVR ON)

HSI OFF,

LSI ON

OFF

Only AWU, BEEP and

IWDG if activated and if

“no watchdog in Halt”

option disabled

AWU or external(3)

interrupts, reset

PXS

HSI OFF,

LSI OFF,

HSI_PXS ON

OFF

PXS

PXS, external(3)

interrupts or reset

Halt

( - - - )

OFF

(LPVR ON)

LSI ON if IWDG

activated and if

"no watchdog in

Halt" option is

disabled.

OFF

Only BEEP and IWDG if

activated and if “no

watchdog in Halt” option

disabled

External interrupts(3),

reset

1. If the peripheral clock is not disabled by Peripheral Clock Gating function.

2. Refer to: Wait for event (WFE) mode on page 70

3. Including communication peripheral interrupts (see interrupt vector table).

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