RM0312 datasheet(44/275 Pages) STMICROELECTRONICS

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Interrupt controller (ITC)

RM0312

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DocID022352 Rev 3

5.4

Activation level/low power mode control

The MCU activation level is configured by programming the AL bit in the CFG_GCR register

(see global configuration register (CFG_GCR)).

This bit is used to control the low power modes of the MCU. In very low power applications,

the MCU spends most of the time in WFI/Halt mode and is woken up (through interrupts) at

specific moments in order to execute a specific task. Some of these recurring tasks are

short enough to be treated directly in an ISR (interrupt service routine), rather than going

back to the main program. To cover this case, you can set the AL bit before entering Low

power mode (by executing WFI/HALT instruction), then the interrupt routine returns directly

to Low power mode. The run time/ISR execution is reduced due to the fact that the register

context is saved only on the first interrupt.

As a consequence, all the operations can be executed in ISR in very simple applications. In

more complex ones, an interrupt routine may relaunch the main program by simply resetting

the AL bit.

For example, an application may need to be woken up by the auto-wakeup unit (AWU)

every 50 ms in order to check the status of some pins/sensors/push-buttons. Most of the

time, as these pins are not active, the MCU can return to Low power mode without running

the main program. If one of these pins is active, the ISR decides to launch the main program

by resetting the AL bit.

5.5

Concurrent and nested interrupt management

STM8 devices feature two interrupt management modes:

•

Concurrent mode

•

Nested mode

RM0312 数据表(PDF) 44 Page - STMicroelectronics