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RM0312 数据表(PDF) 46 Page - STMicroelectronics |
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RM0312 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 275 page ![]() Interrupt controller (ITC) RM0312 46/275 DocID022352 Rev 3 Figure 9 shows an example of nested interrupt management mode. Warning: A stack overflow may occur without notifying the software of the failure. Figure 9. Nested interrupt management Table 10. Vector address map versus software priority bits Vector address ITC_SPRx bits 0x00 8008h I1_0 and I0_0 bits 0x00 800Ch I1_1 and I0_1 bits ... ... 0x00 807Ch I1_29 and I0_29 bits MAIN IT2 TRAP MAIN IT0 3 2 1 3 3 3/0 3 11 00 01 11 11 11 RIM IT1 IT4 IT4 IT1 IT2 IT3 I1 I0 11 / 10 10 SOFTWARE PRIORITY LEVEL |
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