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RM0312 数据表(PDF) 188 Page - STMicroelectronics |
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RM0312 数据表(HTML) 188 Page - STMicroelectronics |
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188 / 275 page  Inter-integrated circuit (I2C) interface RM0312 188/275 DocID022352 Rev 3 19.7.3 Frequency register (I2C_FREQR) Address offset: 0x02 Reset value: 0x00 7 654 3210 Reserved FREQ[5:0] rw Bits 7:6 Reserved Bits 5:0 FREQ[5:0] Peripheral clock frequency. (1) The FREQ field is used by the peripheral to generate data setup and hold times compliant with the I2C specifications. The FREQ bits must be programmed with the peripheral input clock frequency value: The allowed range is between 1 MHz and 16 MHz 000000: not allowed 000001: 1 MHz 000010: 2 MHz ... 010000: 16 MHz Higher values: not allowed 1. The minimum peripheral clock frequencies for respecting the I2C bus timings are: 1 MHz for standard mode and 4 MHz for fast mode |
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