数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ST7FLCD1 数据表(PDF) 83 Page - STMicroelectronics

部件名 ST7FLCD1
功能描述  8-bit MCU for LCD Monitors with 60 KBytes Flash, 2 KBytes RAM, 2 DDC Ports and Infrared Controller
PDF  95 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7FLCD1 数据表(HTML) 83 Page - STMicroelectronics

Back Button ST7FLCD1 Datasheet HTML 79Page - STMicroelectronics ST7FLCD1 Datasheet HTML 80Page - STMicroelectronics ST7FLCD1 Datasheet HTML 81Page - STMicroelectronics ST7FLCD1 Datasheet HTML 82Page - STMicroelectronics ST7FLCD1 Datasheet HTML 83Page - STMicroelectronics ST7FLCD1 Datasheet HTML 84Page - STMicroelectronics ST7FLCD1 Datasheet HTML 85Page - STMicroelectronics ST7FLCD1 Datasheet HTML 86Page - STMicroelectronics ST7FLCD1 Datasheet HTML 87Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 83 / 95 page
background image
83/95
ST7FLCD1
Infrared Preprocessor (IFR)
15
Infrared Preprocessor (IFR)
The Infrared Preprocessor measures the intervals between 2 adjacent edges of a serial input.
15.1
Main Features
Interval measurement between 2 edges (Time Base = 12.5 kHz) @ fCPU = 8 MHz
Choice of active edge
Glitch filter
Overflow detection (20.4 ms = 255/12.5 kHz)
Maskable interrupt
15.2
Functional Description
The IR Preprocessor measures the interval between two adjacent edges of the IFR input signal.
The POSED and NEGED bits determine if the intervals of interest involve:
consecutive positive edges,
negative edges,
or any pair of edges as described in Table 30.
The measurement is a count resulting from a 12.5 kHz clock. Therefore, any pulse width that is less
than 80 µs cannot be detected.
Whenever an edge of the specified polarity is detected, the count accumulated since the previously
detected edge is latched into the IFRDR register, an interrupt is generated and the counter is reset.
If an edge is not detected within 20.4 ms (fCPU = 8 MHz) and the count reaches its maximum value
of 255, it is latched immediately. The internal interrupt flag and also an internal overflow flag are set.
The latch content remains unchanged as long as the overflow flag is set.
The count stored in the latch register is overwritten in case the microcontroller fails to execute the
read before the next edge. Writing to the IFRDR register clears the interrupt and internal overflow
flag.
Figure 43: IFR Block Diagram
Filter Pulse
Edge Detection
8-bit Counter
8-bit Latch
FLSEL POSED NEGED
Interrupt
Clock Generation
12.5 kHz
IFR
fCPU
ITE
IFRCR
IFRDR



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com