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ST7FLCD1 数据表(PDF) 51 Page - STMicroelectronics |
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ST7FLCD1 数据表(HTML) 51 Page - STMicroelectronics |
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51 / 95 page ![]() 51/95 ST7FLCD1 8-bit Analog-to-Digital Converter (ADC) CONTROL/STATUS REGISTER (ADCCSR) Read/Write Reset Value: (00h) Bit 7 = COCO Conversion Complete This bit is set by hardware. It is cleared by software by reading the result in the DR register or writing to the CSR register. 0 Conversion is not complete (default) 1 Conversion can be read from the DR register. Bit 6 = Reserved. This bit must be cleared by software. Bit 5 = ADON A/D converter On This bit is set and cleared by software. 0 A/D converter is switched off (default) 1 A/D converter is switched on Note: Remember that the ADC needs time to stabilize after the ADON bit is set. Bits [4:2] = Reserved. Forced to 0 by hardware. Bits [1:0] = CH[1:0] Channel Selection. These bits are set and cleared by software. They select the analog input to be converted. DATA REGISTER (ADCDR) Read Only Reset Value: (00h) Bits [7:0] = AD[7:0] Analog Converted Value. This register contains the converted analog value in the range 00h to FFh. Reading this register resets the COCO flag. 76 54 321 0 COCO 0 ADON 0 0 0 CH1 CH0 Table 20: Channel Selection Pin CH1 CH0 AIN0 (Default) 00 AIN1 0 1 AIN2 1 0 AIN3 1 1 76 54 321 0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 |
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