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PC87366 数据表(PDF) 157 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 PC87366
功能描述  128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports
PDF  240 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

PC87366 数据表(HTML) 157 Page - National Semiconductor (TI)

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9.0 Game Port (GMP) (Continued)
157
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When a position counter of a game device stops counting, its associated Position Counter Ready bit in the GMPXST register
is set. All the software has to do in this case is wait until the counters associated with the game device are ready, and then
read their values. The least significant byte of a position counter should be read first. The full, 16-bit count value should be
calculated as follows:
X/Y Position Count = GMPnX/YL + (GMPnX
/YH * 256)
where:
GMPnX/YL indicates the low byte of the position counter of device n (either X or Y axis)
GMPnY/HL indicates the high byte of the position coutner of device n (either X or Y axis)
It is the responsibility of the software to calibrate itself according to the actual count values acquired when the game device
was set to indicate its extreme horizontal and vertical positions.
If a position counter has reached the full count of FFFFh, it means that this counter has overflowed. Overflow means that
the counter has reached its full count before the corresponding axis indicator has reached the level of logic 1. In such a case,
the software must decide what to do.
The Game Port supports the following clock frequencies for operating the position counters:
q
1 MHz clock (default)
q
500 KHz clock.
The clock frequency for the position counter of each game device is configured via the GMPCTL register and should be set
by the software to match the physical components of the external game device interface circuitry. Setting the desired position
counter frequency should be done before initiating a position status reading process.
Reading the status of the buttons of the game device(s) is done the same way it is done in Legacy mode. In addition, an
optional debouncer of 16 msec is implemented on each button status input. The debouncers are disabled by default and
may be enabled by software via the GMPCTL register.
9.2.5
Operation Control
When the Game Port is operated in Legacy mode, it can only be operated by polling (see Section 9.2.4,
Legacy Mode).
When the Game Port is operated in Enhanced mode, both kinds of status reading operations (position and button) can be
performed using polling or interrupt controlled operation.
If polling controlled operation is preferred, the software should poll either the GMPLST register for the direct status of the
buttons as in Legacy mode, or the GMPXST register which provides indications regarding button events detected by hard-
ware. The GMPXST register should also be polled for the status of the position counters. When the status is ready, the
counter values can be read. These values reflect the positions indicated by the game device.
If interrupt controlled operation is preferred, the software should first define the events on which an interrupt request is to be
issued. This is done by writing the required values to the GMPEPOL (see Section 9.3.14) and GMPIEN (see Section 9.3.5)
registers. The GMPEPOL register defines the events on which the buttons cause an interrupt request to be issued. These
events are all edge-triggered. The GMPIEN register determines what events are physically routed to the interrupt request
assigned to the Game Port. An independent interrupt enable bit is implemented in the GMPIEN register for each one of the
four buttons and two position counters of the two supported game devices.



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