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PC87366 数据表(PDF) 197 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 197 Page - National Semiconductor (TI) |
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197 / 240 page ![]() 12.0 Temperature Sensor (TMS) (Continued) 197 www.national.com Figure 43. OTS and ALERT Temperature Response Diagrams 12.2.3 ALERT Response Read Sequence The Read Channel Temperature register (RDCHT) holds the temperature value most recently read from the channel. The Temperature Event Status register (TEVSTS) indicates any ALERT detected as long as VSB is maintained. ALERTs are cleared by software. When an IRQ or SMI is received, check the TEVSTS register to see which of the sensors detected an out-of-limit readout, access the channel readouts, read the current value and status information, and clear any pending status bits. 12.2.4 Power-On Reset Default States TMS always powers up in a known state. TMS power-up default conditions are: 1. Local temperature set to 0 °C. 2. Remote temperature set to 0 °C until the TMS senses a diode present on D+ and D- input pins. 3. Status register set to 00h. 4. Command register set to 00h; ALERT and OTS enabled, Standby mode deactivated. OTS Indicates when temperature is sampled by the A/D Converter. TOS1 TOS2 THIGH TLOW ALERT Indicates when temperature is sampled by the A/D Converter. a: ALERT Signal b: OTS Signal TOS2 TLOW2 OTS Indicates when temperature is sampled by the A/D Converter. THIGH2 TLOW1 THIGH1 TOS1 ALERT c: Combined ALERT and OTS Signals |
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