ST7MC1K2-Auto datasheet(156/371 Pages) STMICROELECTRONICS

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SCI data register (SCIDR)

The data register contains the received or transmitted data character, depending on whether

it is read from or written to.

This register performs a double function (read and write) since it is composed of two

registers, one for transmission (TDR) and one for reception (RDR).

The TDR register provides the parallel interface between the internal bus and the output

shift register (see Figure 61).

The RDR register provides the parallel interface between the input shift register and the

internal bus (see Figure 61).

SCI baud rate register (SCIBRR)

Note:

When LIN slave mode is disabled, the SCIBRR register controls the conventional baud rate

generator.

1RWU

Receiver wake-up

This bit determines if the SCI is in mute mode or not. It is set and cleared by software

and can be cleared by hardware when a wake-up sequence is recognized.

0: Receiver in active mode

1: Receiver in mute mode

Notes:

- Before selecting mute mode (by setting the RWU bit) the SCI must first receive a

data byte, otherwise it cannot function in mute mode with wakeup by Idle line

detection.

- In Address Mark Detection Wake-up configuration (WAKE bit = 1) the RWU bit

cannot be modified by software while the RDRF bit is set.

0SBK

Send break

This bit set is used to send break characters. It is set and cleared by software.

0: No break character is transmitted

1: Break characters are transmitted

Note: If the SBK bit is set to ‘1’ and then to ‘0’, the transmitter sends a BREAK word at

the end of the current word.

SCIDR

Reset value: undefined

654

DR[7:0]

R/W

SCIBRR

Reset value: 0000 0000 (00h)

654

SCP[1:0]

SCT[2:0]

SCR[2:0]

R/W

Table 64.

SCICR2 register description (continued)

Bit Name

Function

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