STM8S datasheet(52/467 Pages) STMICROELECTRONICS

52 / 467 page

Flash program memory and data EEPROM

RM0016

52/467

DocID14587 Rev 14

4.8.2

Flash control register 2 (FLASH_CR2)

Address offset: 0x01

Reset value: 0x00

654

3210

OPT

WPRG

ERASE

FPRG

Reserved

PRG

Bit 7 OPT: Write option bytes

This bit is set and cleared by software.

0: Write access to option bytes disabled

1: Write access to option bytes enabled

Bit 6 WPRG: Word programming

This bit is set by software and cleared by hardware when the operation is completed.

0: Word program operation disabled

1: Word program operation enabled

Bit 5 ERASE(1): Block erasing

This bit is set by software and cleared by hardware when the operation is completed.

0: Block erase operation disabled

1: Block erase operation enabled

Bit 4 FPRG(1): Fast block programming

This bit is set by software and cleared by hardware when the operation is completed.

0: Fast block program operation disabled

1: Fast block program operation enabled

Bits 3:1 Reserved

Bit 0 PRG: Standard block programming

This bit is set by software and cleared by hardware when the operation is completed.

0: Standard block programming operation disabled

1: Standard block programming operation enabled (automatically first erasing)

1. The ERASE and FPRG bits are locked when the memory is busy.

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