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数据搜索系统，热门电子元器件搜索 |
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STM8S 数据表(PDF) 30 Page - STMicroelectronics |
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STM8S 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 467 page  Memory and register map RM0016 30/467 DocID14587 Rev 14 3 Memory and register map For details on the memory map, I/O port hardware register map and CPU/SWIM/debug module/interrupt controller registers, refer to the product datasheets. 3.1 Memory layout 3.1.1 Memory map Figure 3. Memory map The RAM upper limit, data EEPROM upper and lower limit, Option Byte upper limit, hardware (HW) registers upper limit, and the program memory upper limit are specific to the device configuration. Please refer to the datasheets for quantitative information. 00 000h RAM upper limit Data EEPROM lower limit Data EEPROM upper limit 00 4800h 00 5000h 00 6000h 00 6800h 00 7F00h 00 8000h 00 8080h RAM Stack Reserved Data EEPROM Reserved Option bytes Reserved HW registers Reserved Boot ROM (optional) Reserved Registers for CPU, SWIM, ITC, DM Interrupt vectors Program EEPROM Program memory upper limit Option bytes upper limit HW registers upper limit ai18468 |
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