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STM8S 数据表(PDF) 76 Page - STMicroelectronics |
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STM8S 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 467 page ![]() Reset (RST) RM0016 76/467 DocID14587 Rev 14 8.3.3 Software reset The application software can trigger reset by clearing bit T6 in the WWDG_CR register. Refer to Section 15: Window watchdog (WWDG). 8.3.4 SWIM reset An external device connected to the SWIM interface can request the SWIM block to generate an MCU reset. 8.3.5 Illegal opcode reset In order to provide enhanced robustness to the device against unexpected behavior, a system of illegal opcode detection is implemented. If a code to be executed does not correspond to any opcode or prebyte value, a reset is generated. This, combined with the Watchdog, allows recovery from an unexpected fault or interference. Note: A valid prebyte associated with a valid opcode forming an unauthorized combination does not generate a reset. 8.3.6 EMC reset To protect the application against spurious write access or system hang-up, possibly caused by electromagnetic disturbance, the most critical registers are implemented as two bitfields that must contain complementary values. Mismatches are automatically detected by this mechanism, triggering an EMC reset and allowing the application to cleanly recover normal operations. |
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