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STM8S 数据表(PDF) 83 Page - STMicroelectronics |
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STM8S 数据表(HTML) 83 Page - STMicroelectronics |
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83 / 467 page ![]() DocID14587 Rev 14 83/467 RM0016 Clock control (CLK) 104 The LSI RC can be switched on and off using the LSIEN bit in the Internal clock register (CLK_ICKR). The LSIRDY flag in the Internal clock register (CLK_ICKR) indicates if the low-speed internal oscillator is stable or not. At startup, the clock is not released until this bit is set by hardware. Calibration Like the HSI RC, the LSI RC device is factory calibrated by ST. However, it is not possible to perform further trimming. Note: When using the independent watchdog with the LSI as clock source, in order to guarantee that the CPU will never run on the same clock in case of corruption, the LSI clock cannot be the master clock if LSI_EN option bit is reset. Refer to the option bytes section in the datasheet. 9.2 Master clock switching The clock switching feature provides an easy to use, fast and secure way for the application to switch from one master clock source to another. 9.2.1 System startup For fast system startup, after a reset the clock controller configures the master clock source as HSI RC clock output divided by 8 (HSI/8). This is to take advantage of the short stabilization time of the HSI oscillator. The /8 divider is to ensure safe start-up in case of poor VDD conditions. Once the master clock is released, the user program can switch the master clock to another clock source. 9.2.2 Master clock switching procedures To switch clock sources, you can proceed in one of two ways: • Automatic switching • Manual switching Automatic switching The automatic switching enables, the user to launch a clock switch with a minimum number of instructions. The software can continue doing other operations without taking care of the switch event exact time. To enable automatic switching, follow the sequence below (refer to the flowchart in Figure 22): 1. Enable the switching mechanism by setting the SWEN bit in the Switch control register (CLK_SWCR). 2. Write the 8-bit value used to select the target clock source in the Clock master switch register (CLK_SWR). The SWBSY bit in the CLK_SWCR register is set by hardware, and the target source oscillator starts. The old clock source continues to drive the CPU and peripherals. |
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