STM8S datasheet(99/467 Pages) STMICROELECTRONICS

部件名	STM8S

功能描述	STM8S Series and STM8AF Series 8-bit microcontrollers

PDF	467 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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99 / 467 page

DocID14587 Rev 14

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RM0016

Clock control (CLK)

104

9.9.11

HSI clock calibration trimming register (CLK_HSITRIMR)

Address offset: 0x0C

Reset value: 0x00

9.9.12

SWIM clock control register (CLK_SWIMCCR)

Address offset: 0x0D

Reset value: 0bXXXX XXX0

654

3210

Reserved

HSITRIM[3:0]

rrw

Bits 7:4 Reserved, must be kept cleared.

Bits 3:0 HSITRIM[3:0] HSI trimming value

These bits are written by software to fine tune the HSI calibration.

Note: In high density STM8S and STM8AF devices, only bits 2:0 are available.

In other devices, bits 3:0 are available to achieve a better HSI resolution. Compatibility with bits

2:0 can be selected through options bytes (refer to datasheet).

654

3210

Reserved

SWIMCLK

Bits 7:1 Reserved.

Bit 0 SWIMCLK SWIM clock divider

This bit is set and cleared by software.

0: SWIM clock divided by 2

1: SWIM clock not divided by 2

STM8S 数据表(PDF) 99 Page - STMicroelectronics