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STM8S 数据表(PDF) 144 Page - STMicroelectronics |
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STM8S 数据表(HTML) 144 Page - STMicroelectronics |
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144 / 467 page ![]() 16-bit advanced control timer (TIM1) RM0016 144/467 DocID14587 Rev 14 Figure 35. Counter update when ARPE = 0 (ARR not preloaded) with prescaler = 2 In Figure 36 the prescaler divider is set to 1, so CK_CNT has the same frequency as CK_PSC. The auto-reload preload is enabled (ARPE = 1), so the next counter overflow occurs at 0xFF. The new auto-reload value register value of 36h is taken into account after the overflow which generates a UEV. Figure 36. Counter update event when ARPE = 1 (TIM1_ARR preloaded) |
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