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STM8S 数据表(PDF) 285 Page - STMicroelectronics |
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STM8S 数据表(HTML) 285 Page - STMicroelectronics |
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285 / 467 page ![]() DocID14587 Rev 14 285/467 RM0016 Serial peripheral interface (SPI) 287 20.4.4 SPI status register (SPI_SR) Address offset: 0x03 Reset value: 0x02 7 654 3210 BSY OVR MODF CRCERR WKUP Reserved TXE RXNE r rc_w0 rc_w0 rc_w0 rc_w0 r r r Bit 7 BSY: Busy flag 0: SPI not busy 1: SPI is busy in communication This flag is set and reset by hardware. Note: BSY flag must be used with cautious: refer to Section 20.3.7: Status flags on page 277 and Section 20.3.8: Disabling the SPI on page 277 Bit 6 OVR: Overrun flag 0: No Overrun occurred 1: Overrun occurred This flag is set by hardware and reset by a software sequence. Bit 5 MODF: Mode fault 0: No Mode fault occurred 1: Mode fault occurred This flag is set by hardware and reset by a software sequence. Bit 4 CRCERR: CRC error flag 0: CRC value received matches the SPI_RXCRCR value 1: CRC value received does not match the SPI_RXCRCR value This flag is set by hardware and cleared by software writing 0. Bit 3 WKUP: Wakeup flag 0: No wakeup event occurred 1: Wakeup event occurred This flag is set on the first sampling edge on SCK when the STM8 is in Halt mode and the SPI is configured as slave. This flag is reset by software writing 0. Bit 2 Reserved Bit 1 TXE: Transmit buffer empty 0: Tx buffer not empty 1: Tx buffer empty Bit 0 RXNE: Receive buffer not empty 0: Rx buffer empty 1: Rx buffer not empty |
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