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ZUSBOPTSC01ZAC 数据表(PDF) 170 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 170 Page - Zilog, Inc. |
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170 / 402 page ![]() Infrared Encoder/Decoder P R E L I M I N A R Y PS024604-1005 Z8 Encore!® Motor Control Flash MCUs Product Specification 148 incoming pulse. If an incoming pulse is detected inside this window this process is repeated. If the incoming data is a logical 1 (no pulse), the endec returns to the initial state and waits for the next falling edge. As each falling edge is detected, the endec clock counter is reset, resynchronizing the endec to the incoming signal. This allows the endec to tolerate jitter and baud rate errors in the incoming data stream. Resynchronizing the endec does not alter the operation of the UART, which ultimately receives the data. The UART is only synchronized to the incoming data stream when a Start bit is received. Infrared Encoder/Decoder Control Register Definitions All infrared endec configuration and status information is set by the UART control regis- ters as defined in LIN-UART Control Register Definitions section on page 130. To prevent spurious signals during IrDA data transmission, set the IREN bit in the UAR- Tx Control 1 Register to 1 to enable the Infrared Encoder/Decoder before enabling the GPIO Port alternate function for the corresponding pin. Caution: |
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