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ZUSBOPTSC01ZAC 数据表(PDF) 313 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 313 Page - Zilog, Inc. |
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313 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y eZ8 CPU Instruction Set Z8FMC16100 Series Flash MCU Product Specification 291 LDEI dst, src dst ← src r ← r + 1 rr ← rr + 1 Ir Irr 83 — ——— —— 2 9 Irr Ir 93 2 9 LDWX dst, src dst ← src ER ER 1F E8 — ——— —— 5 4 LDX dst, src dst ← src r ER 84 — ——— —— 3 2 Ir ER 85 3 3 RIRR 86 3 4 IR IRR 87 3 5 r X(rr) 88 3 4 X(rr) r 89 3 4 ER r 94 3 2 ER Ir 95 3 3 IRR R 96 3 4 IRR IR 97 3 5 ER ER E8 4 2 ER IM E9 4 2 LEA dst, X(src) dst ← src + X r X(r) 98 — ——— —— 3 3 rr X(rr) 99 3 5 MULT dst dst[15:0] ← dst[15:8] * dst[7:0] RR F4 — ——— —— 2 8 NOP No operation 0F — — — — — — 1 2 Table 165. eZ8 CPU Instruction Summary (Continued) Assembly Mnemonic Symbolic Operation Address Mode Op Code(s) (Hex) Flags Fetch Cycles Instr. Cycles dst src C Z S V D H Note: Flags Notation: * = Value is a function of the result of the operation. – = unaffected. X = undefined. 0 = reset to 0. 1 = set to 1. |
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