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28HS01GTAM03 数据表(PDF) 42 Page - Infineon Technologies AG |
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28HS01GTAM03 数据表(HTML) 42 Page - Infineon Technologies AG |
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42 / 138 page  Datasheet 42 of 138 002-18216 Rev. *W 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash Octal interface, 1.8V/3.0V Features 4.5.1.2 Configuration protection LBP has selection bits in Configuration Register 1 (CFR1N[4,0]/CFR1V[4,0] - PLPROT, TLPROT), which either permanently or temporarily protect Status and Configuration registers, thereby again protecting the device's configuration. The temporary protection remains in effect until the next power down or hardware reset or CS# signaling reset. 4.5.1.3 Legacy block protection flowchart The LBP protection scheme flowchart is shown in Figure 43. Figure 43 Legacy block protection flowchart Table 17 Legacy block memory array protection selection CFR1N[5]/CFR1 V[5] TBPROT STR1N[4]/STR1 V[4] LBPROT[2] STR1N[3]/STR1 V[3] LBPROT[1] STR1N[2]/STR1 V[2] LBPROT[0] Memory array block size 256Mb (KBs) 512Mb (KBs) 1Mb (KBs) 0 000 None 0 0 0 0001 Upper 64th 512 1024 2048 0010 Upper 32nd 1024 2048 4096 0011 Upper 16th 2048 4096 8192 0100 Upper 8th 4096 8192 16384 0101 Upper 4th 8192 16384 32768 0110 Upper Half 16384 32768 65536 0111 All sectors 32768 65536 131072 1 000 None 0 0 0 1001 Lower 64th 512 1024 2048 1010 Lower 32nd 1024 2048 4096 1011 Lower 16th 2048 4096 8192 1100 Lower 8th 4096 8192 16384 1101 Lower 4th 8192 16384 32768 1110 Lower Half 16384 32768 65536 1111 All sectors 32768 65536 131072 Table 18 Option 2 - Legacy block configuration protection selection[16] CFR1N[4]/ CFR1V[4] PLPROT CFR1N[0]/ CFR1V[0] TLPROT Register protection status 0 0 Status and Configuration registers are unprotected 1 X Status and Configuration registers are permanently protected (TBPROT, LBPROT[2:0], SP4KBS, TB4KBS) 0 1 Status and Configuration registers are Protected till next Power down (TBPROT, LBPROT[2:0], SP4KBS, TB4KBS) Note 16. Protecting the configuration also protects the memory array blocks which have been selected for protection. |
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