28HS01GTAM03 datasheet(77/138 Pages) INFINEON

77 / 138 page

Datasheet

77 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Registers

STR1V[1]

WRPGEN

Write/Program

Enable Status Flag

V -> R

Description:

The WRPGEN bit must be set to ‘1’ to enable all program, erase or

changes to memory or register values. The Write Enable

(WRENB_0_0) transaction set the WRPGEN bit to '1' to allow

program, erase or write transactions to execute. The Write Disable

(WRDIS_0_0) transaction resets WRPGEN to a ‘0’ to prevent all

program, erase, and write transactions from execution. The

WRPGEN bit is cleared to ‘0’ at the end of any successful program,

erase or register write operation. After a power down / power up

sequence

or a hardware/software reset, the Deep Power Down WRPGEN bit is

cleared to ‘0’.

Selection Options:

0 = Program, erase or register write is disabled

1 = Program, erase or register write is enabled

Dependency: N/A

STR1V[0]

RDYBSY

Device Ready/Busy

Status Flag

V -> R

Description:

The RDYBSY bit indicates whether the device is performing an

embedded operation or is in standby mode ready to receive new

transactions.

Note The PRGERR and ERSERR status bits are updated while RDYBSY

is set. If PRGERR or ERSERR are set, the RDYBSY bit will remain set

indicating the device is busy and unable to receive new transactions.

A Clear Program and Erase Failure Flags (CLPEF_0_0) transaction

must be executed to return the device to standby mode.

Selection Options:

0 = Device is in standby mode ready to receive new operation trans-

actions

1 = Device is busy and unable to receive new operation transactions

Dependency: N/A

Table 42

PRGERR summary

Error flag

Symbol

Conditions

Program Error

PRGERR

Bits cannot be programmed '1' to '0'

Trying to program in a protected region

If ASP0[2] or ASP0[1] is 0, any nonvolatile register write attempting to change the value of CFR1N[6:2]/CFR1V[6:2]

After the Password Protection Mode is selected and ASP Password Register update transaction executed

SafeBoot Failure

Configuration Failure

Table 43

ERSERR summary

Error flag

Symbol

Conditions

Erase Error

ERSERR

Sector Device Erase - All bits cannot be erased to '1's

Trying to erase a protected region

SafeBoot Failure

Table 41

Status register 1[22] (Continued)

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory

default

(binary)

Description

Note

22. STR1x value during POR, Hardware Reset, Software Reset, DPD Exit, and CS# Signaling Reset is not valid.

28HS01GTAM03 数据表(PDF) 77 Page - Infineon Technologies AG

28HS01GTAM03 数据表(HTML) 77 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载