28HS01GTAM03 datasheet(84/138 Pages) INFINEON

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Datasheet

84 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Registers

CFR4N[2]

CFR4V[2]

DPDPOR

Deep Power Down

power saving mode

entry selection upon

POR

N -> R/W

V -> R

Description: The DPDPOR bit selects if the device will be in

either Deep Power Down (DPD) mode or the Standby mode

after the completion of POR. If enabled, DPDPOR configures

the device to start in DPD mode to reduce current

consumption until the device is needed. If the device is in

DPD, a pulse on CS# or a Hardware reset will return the device

to Standby mode.

Selection Options:

0 = Standby mode is entered upon the completion of POR

1 = Deep Power Down Power mode is entered upon the

completion of POR

Dependency: N/A

CFR4N[1:0]

CFR4V[1:0] RBSTWL[1:0]

Read Burst Wrap Length

selection

N -> R/W

V -> R/W

Description: The RBSTWL[1:0] bits select the read burst wrap

length and alignment during normal operation. It selects the

fixed length/aligned group of 8-, 16-, 32-, or 64-bytes.

Selection Options:

00 = 8 Bytes Wrap length

01 = 16 Bytes Wrap length

10 = 32 Bytes Wrap length

11 = 64 Bytes Wrap length

Dependency: RBSTWP (CFR4x[4])

Table 53

Output Data Wrap Sequence

Wrap boundary

(bytes)

Start address

(Hex)

Address sequence (Hex)

Sequential

XXXXXX03

03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14, 15, 16, 17, 18.

XXXXXX00

00, 01, 02, 03, 04, 05, 06, 07, 00, 01, 02.

XXXXXX07

07, 00, 01, 02, 03, 04, 05, 06, 07, 00, 01.

XXXXXX02

02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 00, 01, 02, 03.

XXXXXX0C

0C, 0D, 0E, 0F, 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E.

XXXXXX0A

0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B, 1C, 1D, 1E, 1F, 00, 01, 02, 03, 04, 05, 06, 07, 08,

09, 0A, 0B, 0C, 0D, 0E, 0F.

XXXXXX1E

1E, 1F, 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B, 1C,

1D, 1E, 1F, 00.

XXXXXX03

03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B, 1C, 1D, 1E, 1F, 20, 21,

22, 23, 24, 25, 26, 27, 28, 29, 2A, 2B, 2C, 2D, 2E, 2F, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 3A, 3B, 3C, 3D, 3E, 3F 00,

01, 02.

XXXXXX2E

2E, 2F, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 3A, 3B, 3C, 3D, 3E, 3F, 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C,

0D, 0E, 0F, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B, 1C, 1D, 1E, 1F, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 2A, 2B,

2C, 2D.

Table 52

Configuration register 4 (Continued)

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

28HS01GTAM03 数据表(PDF) 84 Page - Infineon Technologies AG

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