28HS01GTAM03 datasheet(85/138 Pages) INFINEON

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Datasheet

85 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Registers

5.8

Configuration register 5 (CFR5x)

Configuration Register 5 controls the Octal interface device behavior.

5.9

Interface CRC enable register (ICEV)

Interface CRC Enable Register controls the enabling/disabling of the Interface CRC function.

5.10

Interface CRC check-value register (ICRV)

The Interface CRC Check-value Register (ICRV) stores the results of the CRC calculation on the command and Data

Content over the interface for Protection.

Table 54

Configuration register 5

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

CFR5N[7]

CFR5V[7]

RESRVD

Reserved for Future Use

N -> R/W

V -> R/W

These bits are Reserved for future use. This bit must always be

written/loaded to its default state.

CFR5N[6]

CFR5V[6]

RESRVD

Reserved for Future Use

N -> R/W

V -> R/W

CFR5N[5:2]

CFR5V[5:2] RESRVD

Reserved for Future Use

N -> R/W

V -> R/W

0000

CFR5N[1]

CFR5V[1]

SDRDDR

Octal SPI SDR or DDR

selection

N -> R/W

V -> R/W

Description: The SDRDDR bit selects between SDR or DDR for

all data transfers to the device. Based on SDRDDR selection,

all transactions either are SDR or DDR.

Note SDRDDR bit only controls the interface for Octal mode

(8-8-8).

Selection Options:

0 = SDR enabled

1 = DDR enabled

Dependency: N/A

CFR5N[0]

CFR5V[0]

OPI-IT

Octal Interface and

Protocol Selection - I/O

width set to 8 bits (8-8-8)

N -> R/W

V -> R/W

Description: The OPI-IT bit selects the I/O width of the device

to be 8-bits wide. When configured to 8-bits (OPI-IT) all trans-

actions require Opcode, Address and Data always sent on all

eight I/Os.

Selection Options:

0 = Data Width set to 1 bit wide (1x) - Legacy Single SPI Protocol

1 = Data Width set to 8 wide (8x) - Octal Protocol

Dependency: N/A

Table 55

Interface CRC enable register

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

ICEV[7:1]

RESVRD

Reserved for Future

Use

V -> R

0000000

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

ICEV[0]

ITCRCE

Interface CRC

Selection

V -> R/W

Description: The ITCRCE bit controls enabling/disabling of the

Interface CRC function.

Selection Options:

0 = Interface CRC Enabled

1 = Interface CRC Disabled

Dependency: N/A

Table 56

Interface CRC check-value register

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

ICRV[31:0] ITCRCV[31:0] Interface CRC

Checksum Value

V -> R

0xFFFFFFFF

Description: The ITCRCV[31:0] bits store the check-value of the

CRC process on the memory array data contained within the

starting address and the ending address.

Selection Options: Checksum Value

Dependency: N/A

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