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28HS01GTAM03 数据表(PDF) 103 Page - Infineon Technologies AG |
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28HS01GTAM03 数据表(HTML) 103 Page - Infineon Technologies AG |
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103 / 138 page  Reset SRSTE_0_0 Software Reset Enable command is required immediately before a SFRST_0_0 transaction - 66 (CMD) 66 (CMD) -- - - - - - - - - - - Figure 18/ Figure 19 166 / 200 N/A SFRST_0_0 Software Reset transaction restores the device to its initial power up state, by reloading volatile registers from nonvolatile default values SFRSE_0 _0 99 (CMD) 99 (CMD) -- - - - - - - - - - - Deep power down ENDPD_0_0 Enter Deep Power Down Mode transaction shifts device in the lowest power consumption mode - B9 (CMD) B9 (CMD) -- - - - - - - - - - - Table 78 Octal (8S-8S-8S, 8D-8D-8D) transaction table (Continued) Note 32. In case of Octal DDR protocol. |
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