LTM4686BIVPBF datasheet(30/130 Pages) AD

30 / 130 page

LTM4686B

Rev. 0

For more information www.analog.com

OPERATION

pin of the LTM4686B and the respective GPIOn pin. (See

Figure 1). If the GPIOn pin is configured as a PGOOD

indicator, the MFR_GPIO_RESPONSEn must be set to

“ignore” (factory-default 0x00), or else the LTM4686B

cannot start up due to the latch-off conditions imposed.

LTM4686B

Voltage Based Sequencing by Cascading GPIO

n Pins Into RUNn Pins

(MFR_GPIO_PROPAGATE = XXX1X00XX00XXXXXb and MFR_GPIO_RESPONSE = 0x00)

GPIO0 = VOUT0_UVUF

GPIO1 = VOUT1_UVUF

RUN1

NOTE: RESISTOR OR RC PULL-UPS ON RUNn AND GPIOn PINS NOT SHOWN

*OPTIONAL SIGNAL SCHOTTKY DIODE. ONLY NEEDED WHEN ACCURATE PGOOD

(POWER GOOD) INDICATION IS REQURED BY THE SYSTEM/USER IMMEDIATELY

AT SVIN POWER UP

RUN0

START

LTM4686B

4686B F01

RUN0

GPIO0 = VOUT0_UVUF

GPIO1 = VOUT1_UVUF

TO NEXT CHANNEL

IN THE SEQUENCE

RUN1

Figure 1. Event (Voltage) Based Sequencing

The RUNn pin is a bidirectional open-drain pin. This means

it should never be driven logic high from a low imped-

ance source. Instead, simply provide a 10k pull-up resis-

tor from the RUNn pins to VDD33. The LTM4686B pulls

its RUNn pin logic low during NVM-download-to-RAM

initialization, when SVIN is below the commanded under-

voltage lockout voltage (VIN_ON, rising and VIN_OFF,

falling), and subsequent to external stimulus pulling RUN

low—for a minimum time dictated by MFR_RESTART_

DELAYn. Bussing the respective RUNn and GPIOn pins to

sibling LTM4686B modules enables coordinated power-

up/power-down to be well orchestrated, i.e., performing

turn-on and turn-off in a unified fashion.

When RUNn exceeds 1.35V, the LTM4686B initially idles

for a time dictated by the TON_DELAYn register. After

the TON_DELAYn time expires, the module begins ramp-

ing up the respective control loop’s internal reference,

starting from 0V. In the absence of a prebiased VOUTn

condition, the output voltage is ramped linearly from 0V

to the commanded target voltage, with a ramp-up time

dictated by the TON_RISEn register. In the presence of a

prebiased VOUTn condition, the output voltage is brought

into regulation in the same manner as aforementioned,

with the exception that inductor current is prevented

from going negative (the module’s controller is oper-

ated in discontinuous mode operation during start-up).

In both cases, the output voltage reaches regulation in a

consistent time, as measured with respect to RUNn tog-

gling high. See start-up oscilloscope shots in the Typical

Performance Characteristics section.

Pulling the RUNn pin below 0.8V turns off the DC/DC

converter, i.e., forces the respective regulator into a shut-

down state. Factory NVM-default settings configure the

LTM4686B to turn off its power stage MOSFETs imme-

diately, thereby becoming high impedance. The output

voltage then decays according to whatever output capaci-

tance and load impedance is present. Alternatively, NVM/

discharge VOUTn when RUNn is pulled logic low, accord-

ing to prescribed TOFF_DELAYn delay and TOFF_FALLn

ramp-down times. See the Applications Information

section for details. The LTM4686B does not feature

an explicit, analog TRACK pin. Rail-to-rail tracking and

sequencing is handled digitally, as explained previously.

Bussing the open-drain SHARE_CLK pins of all

LTM4686Bs (and providing a pull-up resistor to VDD33)

provides a means for all LTM4686Bs in the system to

synchronize their time-base (or “heartbeat”) to the fast-

est SHARE_CLK clock. Sharing the heartbeat amongst all

LTM4686B ensures that all rails are sequenced according

to expectations; it negates timing errors that could other-

wise materialize due to SHARE_CLK (time-base) tolerance

and part-to-part variation.

Current sense information is derived from across the

power inductors internal to the LTM4686B and made

available to the internal control IC’s current control loops

and ADC sensors. Output current readback telemetry is

available over I2C (READ_IOUT

n registers). Peak output

current readback telemetry is available in the MFR_READ_

IOUT_PEAKn registers.

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