LTM4686BIVPBF datasheet(56/130 Pages) AD

56 / 130 page

LTM4686B

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

pin is shared between LTM4686Bs, only one LTM4686B

can be programmed with a frequency output. All the other

LTM4686Bs must be configured for external clock (MFR_

CONFIG_ALL[4] = 1b, and/or see Table 4).

RCONFIG PIN-STRAPS (EXTERNAL RESISTOR

CONFIGURATION PINS)

The LTM4686B default NVM is programmed to respect

the RCONFIG pins. If a user wishes the output voltage,

PWM frequency and phasing and the address to be set

without programming the part or purchasing specially

programmed parts, the RCONFIG pins can be used to

establish these parameters—provided MFR_CONFIG_

ALL[6] = 0b. The RCONFIG pins only require a resistor

terminating to SGND of the LTM4686B. The RCONFIG

pins are only monitored at initial power up and during a

reset (MFR_RESET or RESTORE_USER_ALL) so modi-

fying their values perhaps using a DAC after the part is

powered will have no effect. To assure proper operation,

the value of RCONFIG resistors applied to the LTM4686B

pin-strapping pins must not deviate more than ±3%

away from the target nominal values indicated in lookup

Table 2 to Table 5, over the lifetime of the product. Thin

film, 1% tolerance (or better), ±50ppm/°C-T.C.R. rated

(or better) resistors from vendors such as KOA Speer,

Panasonic, Vishay and Yageo are good candidates. Noisy

clock signals should not be routed near these pins.

Note that bits [3:0] of MFR_ADDRESS are dictated by

the ASEL pin-strap resistor regardless of the setting of

MFR_CONFIG_ALL[6].

VOLTAGE SELECTION

When an output voltage is set using the RCONFIG pins on

VOUTn_CFG and VTRIMn_CFG (MFR_CONFIG_ALL[6] =

0b), the following parameters are set as a percentage of

the output voltage:

• VOUT_OV_FAULT_LIMIT

+10%

• VOUT_OV_WARN

+7.5%

• VOUT_MAX

+7.5%

• VOUT_MARGIN_HI

+5%

• VOUT_MARGIN_LO

–5%

• VOUT_UV_WARN

–6.5%

• VOUT_UV_FAULT_LIMIT

–7%

CONNECTING THE USB TO THE I2C/SMBus/PMBus

CONTROLLER TO THE LTM4686B IN SYSTEM

The ADI USB to I2C/SMBus/PMBus controller can be

interfaced to the LTM4686B on the user’s board for pro-

gramming, telemetry and system debug. The controller,

when used in conjunction with LTpowerPlay, provides a

powerful way to debug an entire power system. Faults are

quickly diagnosed using telemetry, fault status registers

and the fault log. The final configuration can be quickly

developed and stored to the LTM4686B EEPROM.

Figure 4 and Figure 5 illustrate the application schemat-

ics for powering, programming and communicating with

one or more LTM4686Bs via the ADI I2C/SMBus/PMBus

controller regardless of whether or not system power is

present. If system power is not present the dongle will

power the LTM4686B through the VDD33 supply pin. To

initialize the part when SVIN is not applied and the VDD33

pin is powered use global address 0x5B command 0xBD

data 0x2B followed by address 0x5B command 0xBD

data 0xC4. The part can now be communicated with, and

the project file updated. To write the updated project file

to the NVM issue a STORE_USER_ALL command. When

SVIN is applied, a MFR_RESET or RESTORE_USER_ALL

must be issued to allow the PWM to be enabled and valid

ADCs to be read.

Because of the controllers limited current sourcing capa-

bility, only the LTM4686Bs, their associated pull-up resis-

tors and the I2C pull-up resistors should be powered from

the ORed 3.3V/3.4V supply. In addition, any device shar-

ing the I2C bus connections with the LTM4686B must

not have body diodes between the SDA/SCL pins and

their respective VDD node because this will interfere with

bus communication in the absence of system power. In

Figure 4, the dongle will not bias the LTM4686Bs when

SVIN is present. It is recommended the RUNn pins be held

low to avoid providing power to the load until the part is

fully configured.

LTM4686BIVPBF 数据表(PDF) 56 Page - Analog Devices

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